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參數(shù)資料

Altera Corporation

MAX 7000A Programmable Logic Device Data Sheet

Figure 5. MAX 7000A PIA Routing

While the routing delays of channel-based routing schemes in masked or

FPGAs are cumulative, variable, and path-dependent, the MAX 7000A

PIA has a predictable delay. The PIA makes a design’s timing

performance easy to predict.

I/O Control Blocks

The I/O control block allows each I/O pin to be individually configured

for input, output, or bidirectional operation. All I/O pins have a tri-state

buffer that is individually controlled by one of the global output enable

signals or directly connected to ground or VCC. Figure 6 shows the I/O

control block for MAX 7000A devices. The I/O control block has 6 or

10 global output enable signals that are driven by the true or complement

of two output enable signals, a subset of the I/O pins, or a subset of the

I/O macrocells.

To LAB

PIA Signals

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
EPM7032AETI44-7N	功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7032B	制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device
EPM7032BLC44-3	功能描述:IC MAX 7000 CPLD 32 44-PLCC RoHS:否類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）系列:MAX® 7000B 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28）包裝:托盤(pán)
EPM7032BLC44-5	制造商:Rochester Electronics LLC 功能描述: 制造商:Altera Corporation 功能描述:
EPM7032BLC44-7	制造商:Rochester Electronics LLC 功能描述: 制造商:Altera Corporation 功能描述:

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