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參數(shù)資料
| 型號： | EPM7032AETC44-7 |
| 英文描述： | Eval Board for ISL9200 Charging System Safety Circuit |
| 文件頁數(shù)： | 10/60頁 |
| 文件大?。?/td> | 1041K |
| 代理商： | EPM7032AETC44-7 |
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18
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Table 5. MAX 7000A JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins
BYPASS
Places the 1-bit bypass register between the
TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation
IDCODE
Selects the IDCODE register and places it between the
TDI and TDO pins, allowing the
IDCODE to be serially shifted out of
TDO
USERCODE
Selects the 32-bit USERCODE register and places it between the
TDI and TDO pins,
allowing the USERCODE value to be shifted out of
TDO. The USERCODE instruction is
available for MAX 7000AE devices only
UESCODE
These instructions select the user electronic signature (UESCODE) and allow the
UESCODE to be shifted out of
TDO. UESCODE instructions are available for EPM7128A
and EPM7256A devices only.
ISP Instructions
These instructions are used when programming MAX 7000A devices via the JTAG ports
with the MasterBlaster, ByteBlasterMV, or BitBlaster download cable, or using a Jam
STAPL File, JBC File, or SVF File via an embedded processor or test equipment.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EPM7032AETI44-7 | |
| EPM7128AEFC256-5 | |
| EPM7128AEFC256-7 | |
| EPM7128AEFI100-7 | |
| EPM7128AELC84-10 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EPM7032AETC447N | 制造商:Altera Corporation 功能描述: |
| EPM7032AETC44-7N | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| EPM7032AETI100-7 | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX |
| EPM7032AETI44-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD |
| EPM7032AETI44-7 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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