Figure 22 shows the required " />
參數(shù)資料
型號(hào): EP1K50TI144-2N
廠(chǎng)商: Altera
文件頁(yè)數(shù): 44/86頁(yè)
文件大?。?/td> 0K
描述: IC ACEX 1K FPGA 50K 144-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 180
系列: ACEX-1K®
LAB/CLB數(shù): 360
邏輯元件/單元數(shù): 2880
RAM 位總計(jì): 40960
輸入/輸出數(shù): 102
門(mén)數(shù): 199000
電源電壓: 2.375 V ~ 2.625 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
其它名稱(chēng): 544-1850
EP1K50TI144-2N-ND
Altera Corporation
49
ACEX 1K Programmable Logic Device Family Data Sheet
D
e
ve
lo
pm
e
n
t
13
To
o
ls
Figure 22 shows the required relationship between VCCIO and VCCINT to
satisfy 3.3-V PCI compliance.
Figure 22. Relationship between VCCIO & VCCINT for 3.3-V PCI Compliance
Figure 23 shows the typical output drive characteristics of ACEX 1K
devices with 3.3-V and 2.5-V VCCIO. The output driver is compliant to the
3.3-V PCI Local Bus Specification, Revision 2.2 (when VCCIO pins are
connected to 3.3 V). ACEX 1K devices with a -1 speed grade also comply
with the drive strength requirements of the PCI Local Bus Specification,
Revision 2.2
(when VCCINT pins are powered with a minimum supply of
2.375 V, and VCCIO pins are connected to 3.3 V). Therefore, these devices
can be used in open 5.0-V PCI systems.
3.0
3.1
3.3
VCCIO
IO
3.6
2.3
2.5
2.7
VCCINT
II
(V)
(V)
PCI-Compliant Region
相關(guān)PDF資料
PDF描述
EP1K50TI144-2 IC ACEX 1K FPGA 50K 144-TQFP
A40MX02-1PQ100I IC FPGA MX SGL CHIP 3K 100-PQFP
GSC65DRYI CONN EDGECARD 130PS DIP .100 SLD
GMC65DRYI CONN EDGECARD 130PS DIP .100 SLD
ACM43DTKI CONN EDGECARD 86POS DIP .156 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K50TI144-2P 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-2X 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-3F 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Field Programmable Gate Array (FPGA)
EP1M120 制造商:ALTERA 制造商全稱(chēng):Altera Corporation 功能描述:Programmable Logic Device Family
EP1M120F484C5 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - MERCURY 480 LABs 303 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256