參數(shù)資料
型號(hào): EP1K50TI144-1DX
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 現(xiàn)場(chǎng)可編程門陣列(FPGA)
文件頁(yè)數(shù): 38/86頁(yè)
文件大?。?/td> 1263K
代理商: EP1K50TI144-1DX
Altera Corporation
43
ACEX 1K Programmable Logic Device Family Data Sheet
Development
13
Tools
Notes to tables:
(1)
The most significant bit (MSB) is on the left.
(2)
The least significant bit (LSB) for all JTAG IDCODEs is 1.
ACEX 1K devices include weak pull-up resistors on the JTAG pins.
f For more information, see the following documents:
I
I
Jam Programming & Test Language Specification
Figure 20 shows the timing requirements for the JTAG signals.
Table 16. 32-Bit IDCODE for ACEX 1K Devices
Device
IDCODE (32 Bits)
Version
(4 Bits)
Part Number (16 Bits)
Manufacturer’s
Identity (11 Bits)
1 (1 Bit) (2)
EP1K10
0001
0001 0000 0001 0000
00001101110
1
EP1K30
0001
0001 0000 0011 0000
00001101110
1
EP1K50
0001
0001 0000 0101 0000
00001101110
1
EP1K100
0010
0000 0001 0000 0000
00001101110
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K50TI144-1F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-1P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-1X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-2 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 360 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50TI144-2DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)