參數(shù)資料
型號(hào): EP1K50TC144-3
廠商: Altera
文件頁(yè)數(shù): 41/86頁(yè)
文件大?。?/td> 0K
描述: IC ACEX 1K FPGA 50K 144-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 180
系列: ACEX-1K®
LAB/CLB數(shù): 360
邏輯元件/單元數(shù): 2880
RAM 位總計(jì): 40960
輸入/輸出數(shù): 102
門(mén)數(shù): 199000
電源電壓: 2.375 V ~ 2.625 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
其它名稱(chēng): 544-1074
46
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Table 19. ACEX 1K Device Recommended Operating Conditions
Symbol
Parameter
Conditions
Min
Max
Unit
VCCINT
Supply voltage for internal logic
and input buffers
2.375
(2.375)
2.625
(2.625)
V
VCCIO
Supply voltage for output buffers,
3.3-V operation
3.00 (3.00)
3.60 (3.60)
V
Supply voltage for output buffers,
2.5-V operation
2.375
(2.375)
2.625
(2.625)
V
VI
Input voltage
–0.5
5.75
V
VO
Output voltage
0
VCCIO
V
TA
Ambient temperature
Commercial range
0
70
°
C
Industrial range
–40
85
°
C
TJ
Junction temperature
Commercial range
0
85
°
C
Industrial range
–40
100
°
C
Extended range
–40
125
°
C
tR
Input rise time
40
ns
tF
Input fall time
40
ns
Table 20. ACEX 1K Device DC Operating Conditions (Part 1 of 2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIH
High-level input voltage
1.7,
0.5
× V
CCIO (8)
5.75
V
VIL
Low-level input voltage
–0.5
0.8,
0.3
× V
CCIO (8)
V
VOH
3.3-V high-level TTL output
voltage
IOH = –8 mA DC,
VCCIO =3.00 V (9)
2.4
V
3.3-V high-level CMOS output
voltage
IOH = –0.1 mA DC,
VCCIO =3.00 V (9)
VCCIO –0.2
V
3.3-V high-level PCI output
voltage
IOH = –0.5 mA DC,
VCCIO = 3.00 to 3.60 V
0.9
×V
CCIO
V
2.5-V high-level output voltage IOH = –0.1 mA DC,
VCCIO = 2.375 V (9)
2.1
V
IOH = –1 mA DC,
VCCIO = 2.375 V (9)
2.0
V
IOH = –2 mA DC,
VCCIO = 2.375 V (9)
1.7
V
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