參數(shù)資料
20
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
LE Operating Modes
The ACEX 1K LE can operate in the following four modes:
■
Normal mode
■
Arithmetic mode
■
Up/down counter mode
■
Clearable counter mode
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions that use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 11 shows the ACEX 1K LE operating modes.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K50TC144-3 制造商:Altera Corporation 功能描述:ACEX 1K PLD 1K50 TQFP144 3.3V
EP1K50TC144-3F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TC144-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 360 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50TI144-1DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50TI144-1F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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