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參數(shù)資料
| 型號(hào)： | EM128L08T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128Kx8 Bit Ultra-Low Power Asynchronous Static RAM |
| 中文描述： | 128Kx8位超低功耗異步靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 4/7頁(yè) |
| 文件大?。?/td> | 61K |
| 代理商： | EM128L08T |
Stock No. 23005-07 6/99
4
NanoAmp Solutions
EM128C08
TABLE 6: Timing Test Conditions
TABLE 7: Timing - EM128C08 (Standard Version) Only
Item
Input Pulse Level
0.1V
CC
to 0.9 V
CC
5ns
Input Rise and Fall Time
Input and Output Timing Reference Levels
0.5V
CC
-40 to +85
o
C
-20 to +80
o
C
Operating Temperature - Standard Version
Operating Temperature - Commercial Version
Output Load
CL = 50pF
Item
Symbol
1.5 to 3.6 V
1.8 to 3.6 V
2.7 to 3.6 V
3.0 to 3.6 V
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
t
AA
t
CE
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
500
200
85
70
ns
Address Access Time
500
200
85
70
ns
Chip Enable Access Time
500
200
85
70
ns
Output Enable to Valid Output
100
50
20
20
ns
Chip Enable to Low-Z output
0
0
0
0
ns
Output Enable to Low-Z Output
0
0
0
0
ns
Chip Disable to High-Z Output
0
100
0
50
0
20
0
20
ns
Output Disable to High-Z Output
0
100
0
50
0
20
0
20
ns
Output Hold from Address Change
10
10
10
10
ns
Write Cycle Time
500
200
85
70
ns
Chip Enable to End of Write
500
200
85
70
ns
Address Valid to End of Write
500
200
85
70
ns
Address Set-Up Time
0
0
0
0
ns
Write Pulse Width
250
100
40
35
ns
Write Recovery Time
0
0
0
0
ns
Write to High-Z Output
0
50
0
40
0
20
0
20
ns
Data to Write Time Overlap
200
80
40
30
ns
Data Hold from Write Time
0
0
0
0
ns
End Write to Low-Z Output
10
10
10
10
ns
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