參數(shù)資料
型號： EFM32TG110F32
廠商： Energy Micro
文件頁數(shù)： 131/136頁
文件大小： 0K
描述： MCU 32BIT 32KB FLASH 24-QFN
特色產(chǎn)品： EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝： 1
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： EBI/EMI，I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 17
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 24-VQFN 裸露焊盤
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 914-1033-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
94
www.energymicro.com
If the interrupt signal is still asserted, the state of the interrupt does not change. Otherwise, the state
of the interrupt changes to inactive.
4.2.10 NVIC design hints and tips
Ensure software uses correctly aligned register accesses. The processor does not support unaligned
accesses to NVIC registers. See the individual register descriptions for the supported access sizes.
A interrupt can enter pending state even it is disabled.
Before programming VTOR to relocate the vector table, ensure the vector table entries of the new vector
table are setup for fault handlers, NMI and all enabled exception like interrupts. For more information
4.2.10.1 NVIC programming hints
Software uses the CPSIE I and CPSID I instructions to enable and disable interrupts. The CMSIS
provides the following intrinsic functions for these instructions:
void __disable_irq(void)
// Disable Interrupts
void __enable_irq(void)
// Enable Interrupts
In addition, the CMSIS provides a number of functions for NVIC control, including:
Table 4.11. CMSIS functions for NVIC control
CMSIS interrupt control function
Description
void NVIC_SetPriorityGrouping(uint32_t
priority_grouping)
Set the priority grouping
void NVIC_EnableIRQ(IRQn_t IRQn)
Enable IRQn
void NVIC_DisableIRQ(IRQn_t IRQn)
Disable IRQn
uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)
Return true (IRQ-Number) if IRQn is pending
void NVIC_SetPendingIRQ (IRQn_t IRQn)
Set IRQn pending
void NVIC_ClearPendingIRQ (IRQn_t IRQn)
Clear IRQn pending status
uint32_t NVIC_GetActive (IRQn_t IRQn)
Return the IRQ number of the active interrupt
void NVIC_SetPriority (IRQn_t IRQn, uint32_t
priority)
Set priority for IRQn
uint32_t NVIC_GetPriority (IRQn_t IRQn)
Read priority of IRQn
void NVIC_SystemReset (void)
Reset the system
For more information about these functions see the CMSIS documentation.
4.3 System control block
The System control block (SCB) provides system implementation information, and system control.
This includes configuration, control, and reporting of the system exceptions. The system control block
registers are:
Table 4.12. Summary of the system control block registers
Address
Name
Type
Required
privilege
Reset value
Description
0xE000E008
ACTLR
RW
Privileged
0x00000000
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