- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384282 > EDS6416CHBH (Elpida Memory, Inc.) 64M bits SDRAM (4M words x 16 bits) PDF資料下載
參數(shù)資料
| 型號： | EDS6416CHBH |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 64M bits SDRAM (4M words x 16 bits) |
| 中文描述： | 6400位的SDRAM（4分字× 16位） |
| 文件頁數(shù)： | 31/49頁 |
| 文件大小： | 716K |
| 代理商： | EDS6416CHBH |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
EDS6416AHBH, EDS6416CHBH
Data Sheet E0442E40 (Ver. 4.0)
31
Read command to Write command interval
1. Same bank, same ROW address: When the write command is executed at the same ROW address of the same
bank as the preceding read command, the write command can be performed after an interval of no less than 1
clock. However, UDQM and LDQM must be set High so that the output buffer becomes High-Z before data input.
CLK
Command
DQ (output)
in B2
in B3
READ
WRIT
in B0
in B1
High-Z
DQ (input)
CL=2
CL=3
UDQM
LDQM
BL = 4
Burst write
READ to WRITE Command Interval (1)
CLK
Command
DQ
READ
WRIT
CL=2
CL=3
UDQM
LDQM
2 clock
out
out
out
out
out
in
in
in
in
in
in
in
in
READ to WRITE Command Interval (2)
2. Same bank, different ROW address: When the ROW address changes, consecutive write commands cannot be
executed; it is necessary to separate the two commands with a precharge command and a bank active
command.
3. Different bank: When the bank changes, the write command can be performed after an interval of no less than 1
cycle, provided that the other bank is in the bank active state. However, UDQM and LDQM must be set High so
that the output buffer becomes High-Z before data input.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDS6416CHTA | 64M bits SDRAM (4M words x 16 bits) |
| EDS6416CHTA-75-E | 64M bits SDRAM (4M words x 16 bits) |
| EDS6416AHBH | 64M bits SDRAM (4M words x 16 bits) |
| EDS6416AHBH-6B-E | Circular Connector; No. of Contacts:39; Series:MS27468; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:21; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:21-39 RoHS Compliant: No |
| EDS6416AHBH-75-E | 64M bits SDRAM (4M words x 16 bits) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDS6416CHBH-75-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:64M bits SDRAM (4M words x 16 bits) |
| EDS6416CHTA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:64M bits SDRAM (4M words x 16 bits) |
| EDS6416CHTA-75-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:64M bits SDRAM (4M words x 16 bits) |
| EDS6416GHTA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:64M bits SDRAM |
| EDS6416GHTA-10-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:64M bits SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。