參數(shù)資料
型號: EDS6416AJTA-75-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-54
文件頁數(shù): 28/49頁
文件大?。?/td> 622K
代理商: EDS6416AJTA-75-E
EOL
Product
EDS6416AJTA
Data Sheet E0884E30 (Ver.3.0)
34
Read with auto precharge to Write command interval
1. Different bank: When some banks are in the active state, the second write command (another bank) is executed.
However, UDQM and LDQM must be set High so that the output buffer becomes High-Z before data input. The
internal auto-precharge of one bank starts at the next clock of the second command.
CLK
Command
BS
DQ (output)
DQ (input)
CL = 2
CL = 3
READA
WRIT
in B0
in B1
in B2
in B3
BL = 4
bank0
ReadA
bank3
Write
Note: Internal auto-precharge starts at the timing indicated by "
".
UDQM
LDQM
High-Z
Read with Auto Precharge to Write Command Interval (Different bank)
2. Same bank: The consecutive write command from read with auto precharge (the same bank) is illegal. It is
necessary to separate the two commands with a bank active command.
Write with auto precharge to Read command interval
1. Different bank: When some banks are in the active state, the second read command (another bank) is executed.
However, in case of a burst write, data will continue to be written until one clock before the read command is
executed. The internal auto-precharge of one bank starts at 2 clocks later from the second command.
CLK
Command
BS
DQ (output)
DQ (input)
WRITA
READ
out B0
out B1
out B2
out B3
CL = 3
BL = 4
bank0
WriteA
bank3
Read
Note: Internal auto-precharge starts at the timing indicated by "
".
UDQM
LDQM
in A0
Write with Auto Precharge to Read Command Interval (Different bank)
2. Same bank: The consecutive read command from write with auto precharge (the same bank) is illegal. It is
necessary to separate the two commands with a bank active command.
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