參數(shù)資料
型號: EDS2532EEBH-9A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits SDRAM (8M words x 32 bits)
中文描述: 8M X 32 SYNCHRONOUS DRAM, 7 ns, PBGA90
封裝: ROHS COMPLIANT, FBGA-90
文件頁數(shù): 18/50頁
文件大小: 718K
代理商: EDS2532EEBH-9A-E
EDS2532EEBH-9A
Preliminary Data Sheet E0617E40 (Ver. 4.0)
18
Notes: 1. An interval of tDPL is required between the final valid data input and the precharge command.
2. If tRRD is not satisfied, this operation is illegal.
3. Illegal for same bank, except for another bank.
4. Illegal for all banks.
5. NOP for same bank, except for another bank.
6. Illegal if tRCD is not satisfied.
7. Illegal if tRAS is not satisfied.
8. MRS command must be issued after DOUT finished, in case of DOUT remaining.
9. Illegal if
l
MRD is not satisfied.
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