參數(shù)資料
型號: EDS2532EEBH-9A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits SDRAM (8M words x 32 bits)
中文描述: 8M X 32 SYNCHRONOUS DRAM, 7 ns, PBGA90
封裝: ROHS COMPLIANT, FBGA-90
文件頁數(shù): 14/50頁
文件大小: 718K
代理商: EDS2532EEBH-9A-E
EDS2532EEBH-9A
Preliminary Data Sheet E0617E40 (Ver. 4.0)
14
DQM Truth Table
CKE
DQM
Function
Symbol
n – 1
n
0
1
2
3
Data write / output enable
ENB
H
×
×
×
×
×
×
×
×
×
×
L
L
L
L
Data mask / output disable
MASK
H
H
H
H
H
DQ0 to DQ7 write enable/output enable
ENB0
H
L
×
×
×
×
×
×
DQ8 to DQ15 write enable/output enable
ENB1
H
×
×
×
L
DQ16 to DQ23 write enable/output enable
ENB2
H
×
×
×
L
DQ24 to DQ31 write enable/output enable
ENB3
H
×
×
×
L
DQ0 to DQ7 write inhibit/output disable
MASK0
H
H
×
×
×
DQ8 to DQ15 write inhibit/output disable
MASK 1
H
×
×
×
H
DQ16 to DQ23 write inhibit/output disable
MASK 2
H
×
×
H
DQ24 to DQ31 write inhibit/output disable
Remark: H: VIH. L: VIL.
×
: VIH or VIL
Write:
l
DID is needed.
Read:
l
DOD is needed.
MASK 3
H
×
H
CKE Truth Table
CKE
Current state
Function
Symbol
n – 1
n
/CS
/RAS
/CAS
/WE
Address
Activating
Clock suspend mode entry
H
L
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
Any
Clock suspend mode
L
L
Clock suspend
Clock suspend mode exit
L
H
Idle
CBR (auto) refresh command
REF
H
H
L
L
L
H
Idle
Self refresh entry
SELF
H
L
L
L
L
H
Self refresh
Self refresh exit
L
H
L
H
H
H
L
H
H
×
×
×
Idle
Power down entry
H
L
L
H
H
H
H
L
H
×
×
×
×
×
×
Power down
Power down exit
L
H
H
Remark: H: VIH. L: VIL.
×
: VIH or VIL
L
H
L
H
H
H
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