參數(shù)資料
型號： EDS2532CABH-75L-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 256M bits SDRAM (8M words x 32 bits)
中文描述： 8M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90
封裝： LEAD FREE, FBGA-90
文件頁數(shù)： 37/48頁
文件大?。?/td> 578K
代理商： EDS2532CABH-75L-E
EDS2532CABH
Data Sheet E0395E40 (Ver. 4.0)
37
DQM Control
The DQM mask the DQ data. The UDQM and LDQM mask the upper and lower bytes of the DQ data, respectively.
The timing of UDQM/LDQM is different during reading and writing.
Reading
When data is read, the output buffer can be controlled by DQM. By setting DQM to Low, the output buffer becomes
Low-Z, enabling data output. By setting DQM to High, the output buffer becomes High-Z, and the corresponding
data is not output. However, internal reading operations continue. The latency of DQM during reading is 2 clocks.
Writing
Input data can be masked by DQM. By setting DQM to Low, data can be written. In addition, when DQM is set to
High, the corresponding data is not written, and the previous data is held. The latency of DQM during writing is 0
clock.
CLK
DQ
out 0
out 1
l
DOD = 2 Latency
out 3
DQM
High-Z
Reading
CLK
DQ
in 0
in 1
l
DID = 0 Latency
in 3
DQM
Writing
相關(guān)PDF資料
PDF描述
EDS2532EEBH-75 256M bits SDRAM (8M words x 32 bits)
EDS2532EEBH-75-E 256M bits SDRAM (8M words x 32 bits)
EDS2532AABJ-75 256M bits SDRAM (8M words ?32 bits)
EDS2532AABJ-75-E 256M bits SDRAM (8M words ?32 bits)
EDS2532AABJ-75L-E 256M bits SDRAM (8M words ?32 bits)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDS2532CABJ 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
EDS2532CABJ-1A-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
EDS2532CABJ-1AL-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
EDS2532CABJ-75-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
EDS2532CABJ-75L-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM
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