參數(shù)資料
型號(hào): EDS1232AATA
廠商: Elpida Memory, Inc.
英文描述: 128M bits SDRAM
中文描述: 128兆位內(nèi)存
文件頁(yè)數(shù): 24/55頁(yè)
文件大?。?/td> 564K
代理商: EDS1232AATA
EDS1232CABB, EDS1232CATA
Preliminary Data Sheet E0247E40 (Ver. 4.0)
24
Mode Register
WT = 1
1
2
4
8
R
R
R
R
1
0
0
0
0
JEDEC Standard Test Set (refresh counter test)
BL
WT
LTMODE
0
0
1
x
x
Burst Read and Single Write
(for Write Through Cache)
0
1
Use in future
V
V
V
V
V
V
1
V
1
x
x
x
Vender Specific
BL
WT
LTMODE
0
0
0
0
0
Mode Register Set
V = Valid
x = Don’t care
WT = 0
1
2
4
8
R
R
R
Full page
Bits2-0
000
001
010
011
100
101
110
111
Burst length
Sequential
Interleave
0
1
Wrap type
/CAS latency
R
R
2
3
R
R
R
R
Bits6-4
000
001
010
011
100
101
110
111
Latency
mode
0
0
A0
A1
A2
A3
A4
A5
A7
A6
A8
A9
A10
A11
BA1
BA0
A0
A1
A2
A3
A4
A5
A7
A6
A8
A9
A10
A11
BA1
BA0
A0
A1
A2
A3
A4
A5
A7
A6
A8
A9
A10
A11
BA1
BA0
A0
A1
A2
A3
A4
A5
A7
A6
A8
A9
A10
A11
BA1
BA0
A0
A1
A2
A3
A4
A5
A7
A6
A8
A9
A10
A11
BA1
BA0
x
x
x
x
0
0
Remark
R : Reserved
CLK
CKE
/CS
/RAS
/CAS
/WE
A0 - A11,
BA0(13), BA1(A12)
Mode Register Set
Mode Register Set Timing
相關(guān)PDF資料
PDF描述
EDS1232AATA-60 128M bits SDRAM
EDS1232AATA-60-E 128M bits SDRAM (4M words x 32 bits)
EDS1232AATA-60L 128M bits SDRAM
EDS1232AATA-60L-E 128M bits SDRAM (4M words x 32 bits)
EDS1232AATA-75 128M bits SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDS1232AATA-60 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AATA-60-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AATA-60L 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM
EDS1232AATA-60L-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AATA-60TI 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM WTR (Wide Temperature Range)