參數(shù)資料
型號: EDD2508AETA-6B-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits DDR SDRAM
中文描述: 32M X 8 DDR DRAM, 0.7 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁數(shù): 18/52頁
文件大?。?/td> 492K
代理商: EDD2508AETA-6B-E
EDD2508AETA, EDD2516AETA
Data Sheet E0859E50 (Ver. 5.0)
18
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
/CS
/RAS
/CAS /WE
Address
Command
Operation
Next state
Precharging*
1
H
×
×
×
×
DESL
NOP
ldle
L
H
H
H
×
NOP
NOP
ldle
L
H
H
L
×
BST
ILLEGAL*
11
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL*
11
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
11
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
L
L
H
L
BA, A10
PRE, PALL
NOP
ldle
L
L
L
×
×
ILLEGAL
Idle*
2
H
×
×
×
×
DESL
NOP
ldle
L
H
H
H
×
NOP
NOP
ldle
L
H
H
L
×
BST
ILLEGAL*
11
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL*
11
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
11
L
L
H
H
BA, RA
ACT
Activating
Active
L
L
H
L
BA, A10
PRE, PALL
NOP
ldle
L
L
L
H
×
REF, SELF
Refresh/
Self-refresh*
12
Mode register set*
12
ldle/
Self-refresh
L
L
L
L
MODE
MRS
ldle
Refresh
(auto-refresh)*
3
H
×
×
×
×
DESL
NOP
ldle
L
H
H
H
×
NOP
NOP
ldle
L
H
H
L
×
BST
ILLEGAL
L
H
L
×
×
ILLEGAL
L
L
×
×
×
ILLEGAL
Activating*
4
H
×
×
×
×
DESL
NOP
Active
L
H
H
H
×
NOP
NOP
Active
L
H
H
L
×
BST
ILLEGAL*
11
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL*
11
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
11
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
11
L
L
L
×
×
ILLEGAL
Active*
5
H
×
×
×
×
DESL
NOP
Active
L
H
H
H
×
NOP
NOP
Active
L
H
H
L
×
BST
ILLEGAL
Active
L
H
L
H
BA, CA, A10
READ/READA
Starting read operation Read/READA
L
H
L
L
BA, CA, A10
WRIT/WRITA
Starting write
operation
Write
recovering/
precharging
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
L
L
H
L
BA, A10
PRE, PALL
Pre-charge
Idle
L
L
L
×
×
ILLEGAL
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