- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384277 > EDD1216AASE-7A-E (ELPIDA MEMORY INC) 128M bits DDR SDRAM (8M words x 16 bits) PDF資料下載
參數(shù)資料
| 型號： | EDD1216AASE-7A-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M bits DDR SDRAM (8M words x 16 bits) |
| 中文描述： | 8M X 16 DDR DRAM, 0.75 ns, PBGA60 |
| 封裝： | ROHS COMPLIANT, FBGA-60 |
| 文件頁數(shù)： | 5/49頁 |
| 文件大?。?/td> | 569K |
| 代理商： | EDD1216AASE-7A-E |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
EDD1216AATA
Data Sheet E0444E40 (Ver. 4.0)
5
DC Characteristics 1 (TA = 0
°
C to +70
°
C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V)
Parameter
Symbol
Grade
max.
Unit
Test condition
Notes
Operating current (ACT-PRE)
IDD0
110
mA
CKE
≥
VIH,
tRC = tRC (min.)
CKE
≥
VIH, BL = 4,
CL = 2.5,
tRC = tRC (min.)
1, 2, 9
Operating current
(ACT-READ-PRE)
IDD1
140
mA
1, 2, 5
Idle power down standby
current
IDD2P
3
mA
CKE
≤
VIL
4
Floating idle standby current
IDD2F
35
mA
CKE
≥
VIH, /CS
≥
VIH
DQ, DQS, DM = VREF
CKE
≥
VIH, /CS
≥
VIH
DQ, DQS, DM = VREF
4, 5
Quiet idle standby current
IDD2Q
30
mA
4, 10
Active power down standby
current
IDD3P
20
mA
CKE
≤
VIL
3
Active standby current
IDD3N
55
mA
CKE
≥
VIH, /CS
≥
VIH
tRAS = tRAS (max.)
CKE
≥
VIH, BL = 2,
CL = 2.5
CKE
≥
VIH, BL = 2,
CL = 2.5
tRFC = tRFC (min.),
Input
≤
VIL or
≥
VIH
Input
≥
VDD – 0.2 V
Input
≤
0.2 V
3, 5, 6
Operating current
(Burst read operation)
Operating current
(Burst write operation)
IDD4R
205
mA
1, 2, 5, 6
IDD4W
205
mA
1, 2, 5, 6
Auto Refresh current
IDD5
200
mA
Self refresh current
IDD6
3
mA
Operating current
(4 banks interleaving)
Notes: 1. These IDD data are measured under condition that DQ pins are not connected.
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one clock cycle.
6. DQ, DM and DQS transition twice per one clock cycle.
7. 4 banks active. Only one bank is running at tRC = tRC (min.)
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.
9. Command/Address transition once every two clock cycle.
10. Command/Address stable at
≥
VIH or
≤
VIL.
IDD7A
350
mA
BL = 4
1, 5, 6, 7
DC Characteristics 2 (TA = 0
°
C to +70
°
C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V)
Parameter
Symbol
min.
max.
Unit
Test condition
Notes
Input leakage current
ILI
–2
2
μA
VDD
≥
VIN
≥
VSS
Output leakage current
ILO
–5
5
μA
VDDQ
≥
VOUT
≥
VSS
Output high current
IOH
–15.2
—
mA
VOUT = 1.95V
Output low current
IOL
15.2
—
mA
VOUT = 0.35V
相關PDF資料 |
PDF描述 |
|---|---|
| EDD1216AASE | 128M bits DDR SDRAM (8M words x 16 bits) |
| EDD1216AATA | 128M bits DDR SDRAM (8M words x 16 bits) |
| EDD1216AATA-5 | 128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
| EDD1216AATA-5B-E | 128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
| EDD1216AATA-5C-E | 128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EDD1216AATA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (8M words x 16 bits) |
| EDD1216AATA-5 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
| EDD1216AATA-5B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
| EDD1216AATA-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (8M words x 16 bits, DDR400) |
| EDD1216AATA-6B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (8M words x 16 bits) |
發(fā)布緊急采購，3分鐘左右您將得到回復。