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| 型號(hào)： | E728-EDGE728 |
| 英文描述： | Very High-Speed Dual- and Quad-Channel ECL Delay Lines |
| 中文描述： | 極高速雙和四通道ECL延遲線 |
| 文件頁(yè)數(shù)： | 15/18頁(yè) |
| 文件大?。?/td> | 133K |
| 代理商： | E728-EDGE728 |
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6
2000 Semtech Corp.
www .semtech.com
HIGH-PERFORMANCE PRODUCTS – ATE
Edge728
Circuit Description (continued)
Figure 5. Function Model in Mode 2
OUT1, OUT1*
VWIDTH1
IN1, IN1*
VDELAY1
T
OUT2, OUT2*
VWIDTH2
VDELAY2
T
OUT3, OUT3*
VWIDTH3
VDELAY3
T
OUT4, OUT4*
VWIDTH4
VDELAY4
T
IN2, IN2*
IN3, IN3*
IN4, IN4*
Programming Sequence
VDELAY, in addition to affecting the placement of the rising
edge, also affects the falling edge.
Therefore, when
calibrating a system, VDELAY should be adjusted first. As
VWIDTH affects only the falling edge, it should be adjusted
only after VDELAY is established.
Figure 4. Mode 2 VDELAY and VWIDTH Controls
INPUT
OUTPUT
VWIDTH = Minimum
VWIDTH = Maximum
TPDmin + Tspan
TPDmin + Tspan + Twidth
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