
 128
SAM4CP [DATASHEET]
43051E–ATPL–08/14
12.6.6.3 SMLA and SMLAW
Signed Multiply Accumulate (halfwords).
Syntax
op{
XY
}{
cond
} 
Rd
, 
Rn
, 
Rm
op{
Y
}{
cond
} 
Rd
, 
Rn
, 
Rm
, 
Ra
where:
op
is one of:
SMLA Signed Multiply Accumulate Long (halfwords).
X
 and 
Y
 specifies which half of the source registers 
Rn
 and 
Rm
 are used as the first and second multiply
operand.
If 
X
 is 
B
, then the bottom halfword, bits [15:0], of 
Rn
 is used. 
If 
X
 is 
T
, then the top halfword, bits [31:16], of 
Rn
 is used.
If Y
 is 
B
, then the bottom halfword, bits [15:0], of 
Rm
 is used. 
If 
Y
 is 
T
, then the top halfword, bits [31:16], of 
Rm
 is used.
SMLAW Signed Multiply Accumulate (word by halfword).
Y
 specifies which half of the source register 
Rm
 is used as the second multiply operand.
If 
Y
 is T, then the top halfword, bits [31:16] of 
Rm
 is used.
If 
Y
 is B, then the bottom halfword, bits [15:0] of 
Rm
 is used.
cond
is an optional condition code, see 
“Conditional Execution”
.
Rd
is the destination register. If 
Rd
 is omitted, the destination register is 
Rn
.
Rn, Rm
are registers holding the values to be multiplied.
Ra
is a register holding the value to be added or subtracted from.
Operation
The SMALBB, SMLABT, SMLATB, SMLATT instructions:
Multiplies the specified signed halfword, top or bottom, values from 
Rn
 and 
Rm
.
Adds the value in 
Ra
 to the resulting 32-bit product.
Writes the result of the multiplication and addition in 
Rd
.
The non-specified halfwords of the source registers are ignored.
The SMLAWB and SMLAWT instructions:
Multiply the 32-bit signed values in 
Rn
 with:
The top signed halfword of 
Rm
, 
T
 instruction suffix.
The bottom signed halfword of 
Rm
, 
B
 instruction suffix.
Add the 32-bit signed value in 
Ra
 to the top 32 bits of the 48-bit product. 
Writes the result of the multiplication and addition in 
Rd
.
The bottom 16 bits of the 48-bit product are ignored.
If overflow occurs during the addition of the accumulate value, the instruction sets the Q flag in the APSR. No overflow
can occur during the multiplication.
Restrictions
In these instructions, do not use SP and do not use PC.
Condition Flags
If an overflow is detected, the 
Q
 flag is set.