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參數(shù)資料
| 型號(hào)： | DWP-20(2) |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | LOW-POWER DISSIPATION ADSL LINE DRIVER |
| 中文描述： | 低功耗ADSL線路驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 8/30頁(yè) |
| 文件大?。?/td> | 1105K |
| 代理商： | DWP-20(2) |
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0.01
0.1
Rset t o GND
1
10
100
k
Full Bias Mode
Mid Bias Mode
Low Bias Mode
T
V
CC
=
±
12 V
18
12
6
0
6
12
18
24
L
P
)
100 k
1 M
10 M
100 M
1 G
f Frequency Hz
V
CC
=
±
12 V
Gain = 5
R
F
= 500
R
L
= 100
Full Bias
V
O
= 0.25 V
PP
V
O
= 0.5 V
PP
V
O
= 1 V
PP
V
O
= 2 V
PP
V
O
= 4 V
PP
V
O
= 8 V
PP
V
=
±
12V
Gain = 10
R
F
= 500
R
L
= 100
Full Bias
18
12
6
0
6
12
18
24
30
f
L
P
)
100 k
1 M
10 M
100 M
1 G
f Frequency Hz
V
O
= 16 V
PP
V
O
= 8 V
PP
V
O
= 4 V
PP
V
O
= 2 V
PP
V
O
= 1 V
PP
V
O
= 0.5 V
PP
V
O
= 0.25 V
PP
1
10
100
1000
1
10
100
1000
Vn
H
Vn
10
100
f Frequency Hz
1 k
10 k
100 k
I
H
In
In+
5
3
2
1
0
1
2
3
0.0
0.5
1.0
Time
(
S
)
15
10
5
0
10
15
Vin
Vout
I
O
μ
V
CC
=
±
12 V
Gain = 5
R
L
= 100
18
12
6
0
6
12
18
L
P
)
100 k
1 M
10 M
100 M
1 G
f Frequency Hz
V
=
±
5 V
Gain = 5
R
F
= 750
R
L
= 25
Full Bias
V
O
= 4 V
PP
V
O
= 2 V
PP
V
O
= 1 V
PP
V
O
= 0.5 V
PP
V
O
= 0.25 V
PP
7
6
5
4
3
2
1
0
1
2
f Frequency Hz
O
100 k
1 M
10 M
100 M
1 G
V
CC
=
±
15 V
Gain = 1
R
L
= 25
V
= 0.1 V
rms
Full Bias
R
F
= 2 k
R
F
= 1 k
R
F
= 1.2 k
7
6
5
4
3
2
1
0
1
2
f Frequency Hz
O
100 k
1 M
10 M
100 M
1 G
V
=
±
15 V
Gain = 1
R
L
= 100
V
O
= 0.1 V
rms
Full Bias
R
F
= 2 k
R
F
= 1 k
R
F
= 1.2 k
10
0
10
20
30
40
50
60
70
80
1k
f Frequency Hz
Vcc
Vcc+
P
10k
100k
1M
10M
100M
V
CC
=
±
12 V
Gain = 5
R
F
= 500
R
L
= 100
THS6182
SLLS544G–SEPTEMBER 2002–REVISED NOVEMBER 2004
LARGE SIGNAL OUTPUT
AMPLITUDE
vs
FREQUENCY
LARGE SIGNAL OUTPUT
AMPLITUDE
vs
FREQUENCY
TOTAL QUIESCENT CURRENT
Figure 5.
Figure 6.
Figure 7.
LARGE SIGNAL OUTPUT
AMPLITUDE
vs
FREQUENCY
VOLTAGE AND CURRENT NOISE
vs
FREQUENCY
OVERDRIVE RECOVERY
Figure 8.
Figure 9.
Figure 10.
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
OUTPUT AMPLITUDE
vs
FREQUENCY
OUTPUT AMPLITUDE
vs
FREQUENCY
Figure 11.
Figure 12.
Figure 13.
8
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