- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗3876 > DSPIC30F6013T-20E/PF (Microchip Technology)IC DSPIC MCU/DSP 132K 80TQFP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | DSPIC30F6013T-20E/PF |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 226/228闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC DSPIC MCU/DSP 132K 80TQFP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1,000 |
| 绯诲垪锛� | dsPIC™ 30F |
| 鏍稿績铏曠悊鍣細 | dsPIC |
| 鑺珨灏哄锛� | 16-浣� |
| 閫熷害锛� | 20 MIPS |
| 閫ｉ€氭€э細 | CAN锛孖²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孡VD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 68 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 132KB锛�44K x 24锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 2K x 8 |
| RAM 瀹归噺锛� | 6K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.5 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 16x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 80-TQFP |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 閰嶇敤锛� | DM300024-ND - KIT DEMO DSPICDEM 1.1 AC164314-ND - MODULE SKT FOR PM3 80PF |
| 鍏跺畠鍚嶇ū锛� | DSPIC30F6013T20EP |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�绗�168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�绗�179闋�绗�180闋�绗�181闋�绗�182闋�绗�183闋�绗�184闋�绗�185闋�绗�186闋�绗�187闋�绗�188闋�绗�189闋�绗�190闋�绗�191闋�绗�192闋�绗�193闋�绗�194闋�绗�195闋�绗�196闋�绗�197闋�绗�198闋�绗�199闋�绗�200闋�绗�201闋�绗�202闋�绗�203闋�绗�204闋�绗�205闋�绗�206闋�绗�207闋�绗�208闋�绗�209闋�绗�210闋�绗�211闋�绗�212闋�绗�213闋�绗�214闋�绗�215闋�绗�216闋�绗�217闋�绗�218闋�绗�219闋�绗�220闋�绗�221闋�绗�222闋�绗�223闋�绗�224闋�绗�225闋�鐣�(d膩ng)鍓嶇226闋�绗�227闋�绗�228闋�
2006 Microchip Technology Inc.
DS70117F-page 95
dsPIC30F6011/6012/6013/6014
15.0
I2C MODULE
The Inter-Integrated Circuit (I2CTM) module provides
complete hardware support for both Slave and Multi-
Master modes of the I2C serial communication
standard, with a 16-bit interface.
This module offers the following key features:
I2C interface supporting both master and slave
operation.
I2C Slave mode supports 7 and 10-bit address.
I2C Master mode supports 7 and 10-bit address.
I2C port allows bidirectional transfers between
master and slaves.
Serial clock synchronization for I2C port can be
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
I2C supports multi-master operation; detects bus
collision and will arbitrate accordingly.
15.1
Operating Function Description
The hardware fully implements all the master and slave
functions of the I2C Standard and Fast mode
specifications, as well as 7 and 10-bit addressing.
Thus, the I2C module can operate either as a slave or
a master on an I2C bus.
15.1.1
VARIOUS I2C MODES
The following types of I2C operation are supported:
I2C slave operation with 7-bit address
I2C slave operation with 10-bit address
I2C master operation with 7 or 10-bit address
15.1.2
PIN CONFIGURATION IN I2C MODE
I2C has a 2-pin interface: the SCL pin is clock and the
SDA pin is data.
15.1.3
I2C REGISTERS
I2CCON and I2CSTAT are control and status registers,
respectively. The I2CCON register is readable and writ-
able. The lower 6 bits of I2CSTAT are read only. The
remaining bits of the I2CSTAT are read/write.
I2CRSR is the shift register used for shifting data,
whereas I2CRCV is the buffer register to which data
bytes are written, or from which data bytes are read.
I2CRCV is the receive buffer as shown in Figure 15-1.
I2CTRN is the transmit register to which bytes are
written during a transmit operation, as shown in
The I2CADD register holds the slave address. A status
bit, ADD10, indicates 10-bit Address mode. The
I2CBRG acts as the Baud Rate Generator (BRG)
reload value.
In receive operations, I2CRSR and I2CRCV together
form a double-buffered receiver. When I2CRSR
receives a complete byte, it is transferred to I2CRCV
and
an
interrupt
pulse
is
generated.
During
transmission, the I2CTRN is not double-buffered.
FIGURE 15-1:
PROGRAMMER鈥橲 MODEL
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the 鈥渄sPIC30F Family Reference
Manual鈥� (DS70046).
Note:
Following a Restart condition in 10-bit
mode, the user only needs to match the
first 7-bit address.
Bit 7
Bit 0
I2CRCV (8 bits)
Bit 7
Bit 0
I2CTRN (8 bits)
Bit 8
Bit 0
I2CBRG (9 bits)
Bit 15
Bit 0
I2CCON (16 bits)
Bit 15
Bit 0
I2CSTAT (16 bits)
Bit 9
Bit 0
I2CADD (10 bits)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| PIC16F1526-I/PT | MCU 14KB FLASH 768B RAM 64-TQFP |
| PIC24F08KL401-I/SO | IC MCU 16BIT 8KB FLASH 20-SOIC |
| PIC18F13K50-I/MQ | IC PIC MCU FLASH 512KX8 20-QFN |
| PIC16F1934-I/PT | IC PIC MCU FLASH 256KX7 44-TQFP |
| PIC24F16KL402-I/SS | IC MCU 16BIT 16KB FLASH 28-SSOP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DSPIC30F6013T-20I/PF | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC 20MHz 132KB Flash RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪(sh铆)閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪(sh铆)鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| DSPIC30F6013T-30I/PF | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC 30MHz 132KB Flash RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪(sh铆)閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪(sh铆)鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| DSPIC30F6014-20E/PF | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC 30MHz 132KB Flash RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪(sh铆)閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪(sh铆)鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| DSPIC30F6014-20I/P | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:MCU - Rail/Tube |
| DSPIC30F6014-20I/PF | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC 20MHz 144KB Flash RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪(sh铆)閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪(sh铆)鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
