參數(shù)資料
dsPIC30F Flash Programming Specification
DS70102K-page 40
2010 Microchip Technology Inc.
11.6
Erasing Program Memory in
Low-Voltage Systems
The procedure for erasing program memory (all code
memory and data memory) in low-voltage systems
(with VDD between 2.5 volts and 4.5 volts) is quite
different than the procedure for erasing program
memory in normal-voltage systems. Instead of using a
Bulk Erase operation, each region of memory must be
individually erased by row. Namely, all of the code
memory, executive memory and data memory must be
erased one row at a time. This procedure is detailed in
Due to security restrictions, the FBS, FSS and FGS
register cannot be erased in low-voltage systems.
Once any bits in the FGS register are programmed to
‘0’, they can only be set back to ‘1’ by performing a Bulk
Erase in a normal-voltage system. Alternatively, a Seg-
ment Erase operation can be performed instead of a
Bulk Erase.
Normal-voltage systems can also be used to erase
program memory as shown in Table 11-5. However,
since this method is more time-consuming and does
not clear the code-protect bits, it is not recommended.
Note:
Program memory must be erased before
writing any data to program memory.
TABLE 11-5:
SERIAL INSTRUCTION EXECUTION FOR ERASING PROGRAM MEMORY
(EITHER IN LOW-VOLTAGE OR NORMAL-VOLTAGE SYSTEMS)
Command
(Binary)
Data
(Hexadecimal)
Description
Step 1: Exit the Reset vector.
0000
040100
000000
GOTO 0x100
NOP
Step 2: Initialize NVMADR and NVMADRU to erase code memory and initialize W7 for row address updates.
0000
EB0300
883B16
883B26
200407
CLR
W6
MOV
W6, NVMADR
MOV
W6, NVMADRU
MOV
#0x40, W7
Step 3: Set NVMCON to erase 1 row of code memory.
0000
24071A
883B0A
MOV
#0x4071, W10
MOV
W10, NVMCON
Step 4: Unlock the NVMCON to erase 1 row of code memory.
0000
200558
883B38
200AA9
883B39
MOV
#0x55, W8
MOV
W8, NVMKEY
MOV
#0xAA, W9
MOV
W9, NVMKEY
Step 5: Initiate the erase cycle.
0000
—
0000
A8E761
000000
—
000000
A9E761
000000
BSET NVMCON, #WR
NOP
Externally time ‘P13a’ ms (see Section 13.0 “AC/DC Characteristics and
NOP
BCLR NVMCON, #WR
NOP
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