參數(shù)資料
型號: DSPIC30F6010-20I/PF
廠商: Microchip Technology
文件頁數(shù): 77/110頁
文件大小: 0K
描述: IC PSPIC MCU/DSP 144K 80TQFP
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 90
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 高級欠壓探測/復(fù)位,LVD,電機(jī)控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 68
程序存儲器容量: 144KB(48K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 托盤
配用: DM300019-ND - BOARD DEMO DSPICDEM 80L STARTER
AC164314-ND - MODULE SKT FOR PM3 80PF
DM300020-ND - BOARD DEV DSPICDEM MC1 MOTORCTRL
其它名稱: DSPIC30F601020IPF
2006 Microchip Technology Inc.
DS70119E-page 67
dsPIC30F6010
11.0
TIMER4/5 MODULE
This section describes the second 32-bit General
Purpose Timer module (Timer4/5) and associated
operational modes. Figure 11-1 depicts the simplified
block
diagram
of
the
32-bit
Timer4/5
Module.
Figure 11-2 and Figure 11-3 show Timer4/5 configured
as two independent 16-bit timers, Timer4 and Timer5,
respectively.
The Timer4/5 module is similar in operation to the
Timer
2/3
module.
However,
there
are
some
differences, which are listed below:
The Timer4/5 module does not support the ADC
Event Trigger feature
Timer4/5 can not be utilized by other peripheral
modules such as Input Capture and Output Compare
The operating modes of the Timer4/5 module are
determined by setting the appropriate bit(s) in the 16-bit
T4CON and T5CON SFRs.
For 32-bit timer/counter operation, Timer4 is the least
significant word and Timer5 is the most significant word
of the 32-bit timer.
FIGURE 11-1:
32-BIT TIMER4/5 BLOCK DIAGRAM
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
Note:
Timer4 is a ‘Type B’ timer and Timer5 is a
‘Type C’ timer. Please refer to the appro-
priate timer type in Section 24.0 “Electri-
cal Characteristics” of this document.
Note:
For 32-bit timer operation, T5CON control
bits are ignored. Only T4CON control bits
are used for setup and control. Timer4
clock and gate inputs are utilized for the
32-bit timer module, but an interrupt is
generated with the Timer5 interrupt flag
(T5IF) and the interrupt is enabled with the
Timer5 Interrupt Enable bit (T5IE).
TMR5
TMR4
T5IF
Equal
Comparator x 32
PR5
PR4
Reset
LSB
MSB
Event Flag
Note:
Timer Configuration bit T32, T4CON(<3>) must be set to ‘1’ for a 32-bit timer/counter operation. All
control bits are respective to the T4CON register.
Data Bus<15:0>
TMR5HLD
Read TMR4
Write TMR4
16
Q
QD
CK
TGATE(T4CON<6>)
(T4CON<6>)
TGATE
0
1
TON
TCKPS<1:0>
Prescaler
1, 8, 64, 256
2
TCY
TC
S
1 x
0 1
TG
A
T
E
0 0
Gate
T4CK
Sync
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