參數(shù)資料
型號(hào): DSPIC30F3012-20I/SO
廠商: Microchip Technology
文件頁數(shù): 49/161頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 24K 18SOIC
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 42
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲(chǔ)器容量: 24KB(8K x 24)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
包裝: 管件
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
AC30F005-ND - MODULE SCKT DSPIC30F 18DIP/SOIC
其它名稱: DSPIC30F301220ISO
PIC18F46J11 FAMILY
DS39932D-page 172
2011 Microchip Technology Inc.
11.1
Module Registers
The PMP module has a total of 14 Special Function
Registers (SFRs) for its operation, plus one additional
register to set configuration options. Of these, eight
registers are used for control and six are used for PMP
data transfer.
11.1.1
CONTROL REGISTERS
The eight PMP Control registers are:
PMCONH and PMCONL
PMMODEH and PMMODEL
PMSTATL and PMSTATH
PMEH and PMEL
The
PMCON
registers
and
Register 11-2) control basic module operations, includ-
ing turning the module on or off. They also configure
address multiplexing and control strobe configuration.
The
PMMODE
registers
and
Register 11-4) configure the various Master and Slave
modes, the data width and interrupt generation.
The PMEH and PMEL registers (Register 11-5 and
Register 11-6) configure the module’s operation at the
hardware (I/O pin) level.
The
PMSTAT
registers
and
Register 11-6) provide status flags for the module’s
input and output buffers, depending on the operating
mode.
REGISTER 11-1:
PMCONH: PARALLEL PORT CONTROL REGISTER HIGH BYTE (BANKED F5Fh)(1)
R/W-0
U-0
R/W-0
PMPEN
ADRMUX1
ADRMUX0
PTBEEN
PTWREN
PTRDEN
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
PMPEN:
Parallel Master Port Enable bit
1
= PMP enabled
0
= PMP disabled, no off-chip access performed
bit 6-5
Unimplemented:
Read as ‘0’
bit 4-3
ADRMUX<1:0>:
Address/Data Multiplexing Selection bits
11
= Reserved
10
= All 16 bits of address are multiplexed on PMD<7:0> pins
01
= Lower 8 bits of address are multiplexed on PMD<7:0> pins (only eight bits of address are
available in this mode)
00
= Address and data appear on separate pins (only eight bits of address are available in this mode)
bit 2
PTBEEN:
Byte Enable Port Enable bit (16-Bit Master mode)
1
= PMBE port enabled
0
= PMBE port disabled
bit 1
PTWREN:
Write Enable Strobe Port Enable bit
1
= PMWR/PMENB port enabled
0
= PMWR/PMENB port disabled
bit 0
PTRDEN:
Read/Write Strobe Port Enable bit
1
= PMRD/PMWR port enabled
0
= PMRD/PMWR port disabled
Note 1:
This register is only available in 44-pin devices.
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