參數資料
型號： DSP56F807VF80E
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： 16-bit Digital Signal Controllers
中文描述： 16位數字信號控制器
文件頁數： 11/60頁
文件大?。?/td> 522K
代理商： DSP56F807VF80E
Clock and Phase Locked Loop Signals
56F807 Technical Data Technical Data, Rev. 15
Freescale Semiconductor
11
2.3 Clock and Phase Locked Loop Signals
2.4 Address, Data, and Bus Control Signals
Table 2-5 PLL and Clock
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
EXTAL
Input
Input
External Crystal Oscillator Input
—This input should be connected to
an 8MHz external crystal or ceramic resonator. For more information,
please refer to
Section 3.4
.
1
XTAL
Input/
Output
Chip-driven
Crystal Oscillator Output
—This output should be connected to an
8MHz external crystal or ceramic resonator. For more information, please
refer to
Section 3.4
.
This pin can also be connected to an external clock source. For more
information, please refer to
Section 3.4.2
.
1
CLKO
Output
Chip-driven
Clock Output
—This pin outputs a buffered clock signal. By programming
the CLKOSEL[4:0] bits in the CLKO Select Register (CLKOSR), the user
can select between outputting a version of the signal applied to XTAL and
a version of the device’s master clock at the output of the PLL. The clock
frequency on this pin can also be disabled by programming the
CLKOSEL[4:0] bits in CLKOSR.
Table 2-6 Address Bus Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
6
A0–A5
Output
Tri-stated
Address Bus
—A0–A5 specify the address for external Program or
Data memory accesses.
2
A6–A7
GPIOE2-
GPIOE3
Output
Input/O
utput
Tri-stated
Input
Address Bus
—A6–A7 specify the address for external Program or
Data memory accesses.
Port E GPIO
—These two General Purpose I/O (GPIO) pins can
individually be programmed as input or output pins.
After reset, the default state is Address Bus.
8
A8–A15
GPIOA0-
GPIOA7
Output
Input/O
utput
Tri-stated
Input
Address Bus
—A8–A15 specify the address for external Program or
Data memory accesses.
Port A GPIO
—These eight General Purpose I/O (GPIO) pins can be
individually programmed as input or output pins.
After reset, the default state is Address Bus.
相關PDF資料
PDF描述
DSP56F807 16-bit Hybrid Controller(16位混合控制器)
DSP56F826BU80 16-bit Digital Signal Controllers
DSP56F826BU80E 16-bit Digital Signal Controllers
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相關代理商/技術參數
參數描述
DSP56F807VF80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC
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DSP56F826 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56F826-827UM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor Users Manual
DSP56F826-827UM/D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller
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