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參數(shù)資料
| 型號(hào)： | DSC-544-I-1-R |
| 英文描述： | Digital-to-Synchro Converter |
| 中文描述： | 數(shù)字到同步器 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 185K |
| 代理商： | DSC-544-I-1-R |
ANALOG OUTPUT
(TRANSFORMER-ISOLATED)
Drive Capability (L-L Balanced)
Synchro Output
90V rms L-L, 360-440 Hz
Option H
90V rms L-L, 57-63 Hz
Option I
Output Scale Factor
Absolute (All Causes)
Variation With Digital Angle
Output Quadrature
2
RESOLUTION
VALUE
14 bits
PARAMETER
TABLE 1. DSC-544 SPECIFICATIONS
ACCURACY (TO FULL LOAD)
Output Accuracy
Differential Linearity
±4 minutes
±1 LSB max
DIGITAL INPUT
Logic Type
Loading
The output amplifiers will drive loads
with any phase angle from -90° to +90°.
REFERENCE INPUT
(TRANSFORMER-ISOLATED
Reference Voltage Level
Max Voltage Without Damage
Current
No Load
Option H
Option I
Additional With Load
Natural binary angle.
parallel positive logic
TTL compatible
Transient protected CMOS
33 k
pull-up to +5 V
0.13 Std TTL loads
115V rms ±10%
138V rms
40 mA max
50 mA max
1 mA per mA of load
+5 V±5%
+7 V
20 mA max
POWER SUPPLY
Voltage
Max Voltage Without Damage
Current
TEMPERATURE RANGES
Operating (Temperature Of Metal
Plate On Top Of Case)
-1 Option
-3 Option
Storage
-55°C to +85°C
0°C to +70°C
-55°C to +1253C
PHYSICAL CHARACTERISTICS
Size (Encapsulated Module)
Weight
3.125 x 2.625 x 0.82 inches
(7.94 x 6.67 x 2.08 cm)
8 oz (227 gm)
INTRODUCTION
The DSC-544 circuit is divided into three parts which are trans-
former-isolated from each other (see FIGURE 1). The first part
contains the reference input, the second part contains the digital
input and an internal digital-to-resolver (D/R) converter, and the
third part contains output power amplifiers and an associated
pulsating power supply.
Reference input isolation is provided by the reference trans-
former and by the power transformer. The converter output sig-
nals are proportional to the applied reference, and any distortion
in the reference input will appear in the output signals. The
power transformer has a voltage clamp which protects the power
amplifiers against transients in the reference input.
The internal D/R converter in the DSC-544 operates from an
internal power supply connected to the reference input. The cir-
cuit in the internal D/R is based on an algorithm whose theoreti-
cal math error is only ±3.5 arc-seconds (less than 5% of 1 LSB)
and whose theoretical scale factor variation with angle is less
than ±0.015%. The output is clean, with negligible glitches at
major transition points. The accuracy and scale factor errors are
not limited by the physical components, but by the algorithm.
The digital inputs are transient-protected CMOS switches with
33
k
pull-up resistors that are connected to the +5 V supply, and
can be driven by all standard TTL gates. If the TTL gates drive
other loads as well, the circuit must allow the 33
k
resistors to
pull-up the logic 1 level to within 1.0 V of the +5 V supply. Bit
weights for the 14 binary inputs are given in TABLE 2.The angle
is determined by adding bits that are in the logic 1 state.
1 MSB
2
3
4
5
6
7
8
9
10
11
12
13
14 LSB
180
90
45
22.5
11.25
5.625
2.813
1.406
0.7031
0.3516
0.1758
0.0879
0.0439
0.0220
BIT
DEG/BIT
MIN/BIT
10,800
5,400
2,700
1,350
675
337.5
168.75
84.38
42.19
21.09
10.55
5.27
2.64
1.32
TABLE 2. BIT WEIGHT TABLE
1.33 k
min
4.0 k
min
±2% max simultaneous
amplitude variation on all
output lines, including
variation with digital angle.
Output amplitude tracks
reference input amplitude.
±0.1% max
±0.2% max
The output section of the DSC-544 offers the most benefits to its
users. The pulsating power supply produces two unfiltered, full-
wave-rectified positive and negative voltages (see FIGURE 2).
These voltages are in phase with the amplifier output voltage
because power is derived from the reference input. The ampli-
tude of the two voltages only needs to be a few volts greater than
the power amplifier voltage, since both will change together if the
reference voltage level changes. As FIGURE 2 indicates, the
NOTE:These specifications apply over operating temperature and
frequency range, ±5% power supply variation, ±10% reference
amplitude variation, up to 10% harmonic distortion on reference
input, and for any load up to full load.
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