參數(shù)資料
型號(hào)： DS87C520-WCL
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 9/43頁(yè)
文件大小： 0K
描述： IC MCU EPROM/ROM 33MHZ HS 40CDIP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 10
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，SIO，UART/USART
外圍設(shè)備： 電源故障復(fù)位，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： EPROM，UV
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 40-CDIP（0.600"，15.24mm）窗口
包裝： 管件
其它名稱： DS87C520WCL
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
17 of 43
Crystal/Ring Operation
The DS87C520/DS83C520 allow software to choose the clock source as an independent selection from
the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under
software control. Power-on reset default is the crystal (or external clock) source. The ring may save
power depending on the actual crystal speed. To save still more power, software can then disable the
crystal amplifier. This process requires two steps. Reversing the process also requires two steps.
The XT/ RG bit (EXIF.3) selects the crystal or ring as the clock source. Setting XT/ RG = 1 selects the
crystal. Setting XT/ RG = 0 selects the ring. The RGMD (EXIF.2) bit serves as a status bit by indicating
the active clock source. RGMD = 0 indicates the CPU is running from the crystal. RGMD = 1 indicates it
is running from the ring. When operating from the ring, disable the crystal amplifier by setting the
XTOFF bit (PMR.3) to 1. This can only be done when XT/ RG = 0.
When changing the clock source, the selection will take effect after a one-instruction cycle delay. This
applies to changes from crystal to ring and vise versa. However, this assumes that the crystal amplifier is
running. In most cases, when the ring is active, software previously disabled the crystal to save power. If
ring operation is being used and the system must switch to crystal operation, the crystal must first be
enabled. Set the XTOFF bit to 0. At this time, the crystal oscillation will begin. The
DS87C520/DS83C520 then provide a warm-up delay to make certain that the frequency is stable.
Hardware will set the XTUP bit (STATUS.4) to a 1 when the crystal is ready for use. Then software
should write XT/ RG to 1 to begin operating from the crystal. Hardware prevents writing XT/ RG to 1
before XTUP=1. The delay between XTOFF = 0 and XTUP = 1 will be 65,536 crystal clocks in addition
to the crystal cycle startup time.
Switchback has no effect on the clock source. If software selects a reduced clock divider and enables the
ring, a Switchback will only restore the divider speed. The ring will remain as the time base until altered
by software. If there is serial activity, Switchback usually occurs with enough time to create proper baud
rates. This is not true if the crystal is off and the CPU is running from the ring. If sending a serial
character that wakes the system from crystal-less PMM, then it should be a dummy character of no
importance with a subsequent delay for crystal startup.
Figure 3 illustrates a typical decision set associated with PMM. Table 6 is a summary of the bits relating
to PMM and its operation.
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