參數(shù)資料
型號: DS80C400-FNY+
廠商: Maxim Integrated Products
文件頁數(shù): 60/97頁
文件大?。?/td> 0K
描述: IC MCU 75MHZ 16MB HP 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 75MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 64
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: ROM
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
配用: DS80C400-KIT#-ND - EVAL KIT FOR DS80C400
其它名稱: DS80C400+FNY
DS80C400+FNY+
DS80C400+FNY+-ND
DS80C400+FNY-ND
DS80C400 Network Microcontroller
63 of 97
Multicast Hash Filter
Hash filtering of destination addresses requires that a hash table be established. The hash table must be
programmed into the CSR multicast address low and multicast address high registers. When hash filtering has
been selected, the 6 bytes of the destination address are passed through the internal CRC-32 logic. The most
significant 6 bits of the resultant CRC-32 are used to index into the hash table. From those 6 bits, the most
significant bit determines whether multicast address high or low is used, while the lower 5 bits provide the bit index
into the selected CSR register. If the multicast address high or low register bit indexed by the upper 6 bits of the
CRC-32 is programmed to 1, then the destination address passes. Figure 8 shows the hash filtering process.
Figure 8. Hash Table Index Generation
VLAN Support
The DS80C400 offers VLAN support through recognition of frames that are tagged as such. Each VLAN tag
provides tag control information (TCI) containing a tag protocol ID (TPID) and VLAN ID. The incoming TPID occupy
the 13th and 14th byte positions, those that would normally contain either the length or type field for the frame. The
TPID is compared against the VLAN1 (20h) and VLAN2 (24h) CSR registers.
If a non-zero match occurs between the TPID and VLAN1 register setting, the frame is recognized as having a
VLAN1 tag. For VLAN1 tagged frames, the TPID is followed by 2 Bytes containing the VLAN ID; therefore, the
MAC extends the maximum legal frame length by a total of 4 Bytes (TPID = 2 Bytes, VLAN ID = 2 Bytes).
If a non-zero match occurs between the TPID and VLAN2 register setting, the frame is recognized as having a
VLAN2 tag. For VLAN2 tagged frames, the TPID is followed by 18 Bytes containing the VLAN ID; therefore, the
MAC extends the maximum legal frame length by a total of 20 Bytes (TPID = 2 Bytes, VLAN ID = 18 Bytes).
Figure 9. VLAN Tagged Frame
ETHERNET FRAME
CRC-32 OF DESTINATION ADDRESS BYTES
PREAMBLE SFD
DESTINATION ADDRESS
SOURCE ADDRESS
TYPE/LENGTH
DATA
CRC-32
CRC-32 GENERATOR
POLYNOMIAL
. . .
BIT INDEX
00000b: bit 0
00001b: bit 1
.
11110b: bit 30
11111b: bit 31
MULTICAST REGISTER SELECT
0: Multicast Address Low
1: Multicast Address High
TCI
ETHERNET FRAME
PREAMBLE SFD DESTINATION ADDRESS
SOURCE ADDRESS TYPE/LENGTH
DATA
CRC-32
(7)
(1)
(6)
(2)
(46-1500)
(4)
TPID
VLAN ID
(2)
(2: VLAN1)
(18: VLAN2)
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