參數(shù)資料
型號: DS3911T+
廠商: Maxim Integrated Products
文件頁數(shù): 9/24頁
文件大小: 0K
描述: IC DAC 10BIT I2C QUAD 14TDFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
位數(shù): 10
數(shù)據(jù)接口: I²C,串行
轉換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 1.74W
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應商設備封裝: 14-TDFN-EP(3x5)
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): *
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
17
Maxim Integrated
Lower Memory, Register 01h: MODE
Lower Memory, Register 02h: SRAM
POWER-ON VALUE
00h
ACCESS
R/W
MEMORY TYPE
Volatile
02h
SRAM
BIT 7
BIT 0
These general-purpose SRAM bits have no affect on device operation.
POWER-ON VALUE
40h
ACCESS
R/W
MEMORY TYPE
Volatile
01h
SEE
AEN
SRAM
SOFTTXD
BIT 7
BIT 0
BIT 7
SEE: Shadowed EEPROM Disable
0 = Enables EEPROM writes to the shadowed EEPROM bytes.
1 = Disables EEPROM writes to shadowed EPPROM bytes during configuration, so that the
configuration of the device is not delayed by the EEPROM cycle time. Once the values are known,
write this bit to a 0 and write the shadowed EEPROM locations again for data to be written to the
EEPROM.
BIT 6
AEN: Automatic Enable
0 = The temperature-calculated index value TINDEX is writable by the user and the automatic
updates of calculated indexes are disabled. This allows users to interactively test their modules by
controlling the indexing for the LUTs. The recalled values from the LUTs appear in the DAC VALUE
registers after the next completion of a temperature conversion.
1 = The internal temperature sensor determines the value of TINDEX.
BITS 5:1
SRAM: General-Purpose SRAM. These bits have no affect on device operation.
BIT 0
SOFTTXD: Soft Transmit Disable
0 = DACs operate normally.
1 = The DAC outputs are forced to the bit value of the POL bit, which is located in the DAC’s
associate DAC POR register.
For example, when SOFTTXD is set and POL = 1 in the DAC0 POR register, DAC0 is forced to full-
scale output, but if POL = 0, DAC0 is forced to a zero output. This applies to all four DACs.
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