參數(shù)資料
型號: DS3911T+
廠商: Maxim Integrated Products
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC DAC 10BIT I2C QUAD 14TDFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
位數(shù): 10
數(shù)據(jù)接口: I²C,串行
轉換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 1.74W
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應商設備封裝: 14-TDFN-EP(3x5)
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): *
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
19
Maxim Integrated
Lower Memory, Register 06h–07h: VCC VALUE
Lower Memory, Register 10h–11h: DAC3 VALUE
Lower Memory, Register 12h–13h: DAC2 VALUE
Lower Memory, Register 14h–15h: DAC1 VALUE
Lower Memory, Register 16h–17h: DAC0 VALUE
POWER-ON VALUE
0000h
ACCESS
R
MEMORY TYPE
Volatile
06h
212
211
210
29
28
27
26
25
07h
24
23
22
21
20
0
BIT 7
BIT 0
Left-justified unsigned voltage measurement. To calculate the supply voltage, simply convert the hexadecimal
result into decimal and then multiply it by the LSB as shown in the Analog Voltage Monitoring Characteristics
electrical characteristics table. The lower 3 bits always return zero.
POWER-ON VALUE
0000h
ACCESS
When EN = 1: R
ACCESS
When EN = 0: R/W
MEMORY TYPE
Volatile
10h, 12h,
14h, 16h
29
28
27
26
25
24
23
22
11h, 13h,
15h, 17h
21
20
SRAM
BIT 7
BIT 0
These registers are the left- justified digital 10-bit value used for their associated DAC output. The lower 6 bits
have no effect on device operation. At POR these registers are updated to the EEPROM value DAC POR. When
the EN bit in DAC POR is set, this register is updated at the end of each temperature conversion, with the calcu-
lated result of values recalled from LUT and OFFSET LUT pointed to by TINDEX.
REF
DAC
V
DAC VALUE
1024
=
×
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