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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | DS3508E+T&R |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 12/14闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC GAMMA BUFFER 8CH 20-TSSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 鎳�(y墨ng)鐢細 | TFT-LCD 闈㈡澘锛氫冀鐟珐娌栧櫒 |
| 闆昏矾鏁�(sh霉)锛� | 8 |
| 闆绘祦 - 闆绘簮锛� | 2mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 6mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 9 V ~ 15.5 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 20-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 20-TSSOP |
| 鍖呰锛� | 甯跺嵎 (TR) |
DS3508
I2C, 8-Channel Gamma Buffer with EEPROM
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
TYPE
FUNCTION
1
SCL
Input
Serial Clock Input. I2C clock input.
2
SDA
Input/
Output
Serial Data Input/Output (Open Drain). I2C bidirectional data pin that requires a pullup
resistor to realize high logic levels.
3
GND
Ground
4
A0
Input
Address Input. Determines I2C slave address.
5
VHH
Reference
Input
High-Voltage DAC, Upper Reference
6
VHM
Reference
Input
High-Voltage DAC, Lower Reference
7
VLM
Reference
Input
Low-Voltage DAC, Upper Reference
8
VLL
Reference
Input
Low-Voltage DAC, Lower Reference
9
VDD
Power
Analog Supply
10, 11
N.C.
鈥�
No Connection
12
GM8
13
GM7
14
GM6
15
GM5
Output
Gamma Analog Outputs 5鈥�8. These pins are the low-voltage gamma outputs
referenced to VLL and VLM.
16
GM4
17
GM3
18
GM2
19
GM1
Output
Gamma Analog Outputs 1鈥�4. These pins are the high-voltage gamma outputs
referenced to VHH and VHM.
20
VCC
Power
Digital Supply
Detailed Description
The DS3508 provides eight independent DACs that
allow precise and repeatable setting of gamma curves.
The DS3508 provides four high-voltage DACs
(GM1鈥揋M4) that operate between VHH and VHM and
four low-voltage DACs (GM5鈥揋M8) that operate
between VLM and VLL. Each of the DACs provides 8
bits of resolution.
The DS3508 DAC output voltages are independently
controlled by the data stored in that channel鈥檚 SRAM
register. The MODE bit in the volatile control register
(CR bit 7) determines how I2C data is written to the
SRAM and EEPROM gamma data registers. Reading
and writing to the SRAM/EEPROM gamma data regis-
ters is based on the state of the MODE bit as follows:
MODE = 0:
I2C writes to memory addresses
00h鈥�07h write to both SRAM 1鈥�8 and
EEPROM 1鈥�8.
I2C reads from addresses 00h鈥�07h
read from SRAM 1鈥�8.
MODE = 1:
I2C writes to addresses 00h鈥�07h write
to SRAM 1鈥�8.
I2C reads from addresses 00h鈥�07h
read from SRAM 1鈥�8.
Regardless of the MODE bit setting, all I2C reads of
address 00鈥�07h return the contents of the SRAM regis-
ters. Setting MODE = 1 allows for quick writing of SRAM
without the added delay of writing to the associated
EEPROM register. The data that is stored in EEPROM and
SRAM remains unchanged if the MODE bit is toggled.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| MAX5354EPA+ | IC DAC 10BIT 5V VOLT OUT 8-DIP |
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| VE-23X-IV-F4 | CONVERTER MOD DC/DC 5.2V 150W |
| VE-22P-MX | CONVERTER MOD DC/DC 13.8V 75W |
| VE-23X-IV-F3 | CONVERTER MOD DC/DC 5.2V 150W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS3508FP000 | 鍒堕€犲晢:Thomas & Betts 鍔熻兘鎻忚堪:30A,CON,4P5W,MG,508,3P220V |
| DS3508FR000 | 鍒堕€犲晢:Thomas & Betts 鍔熻兘鎻忚堪:30A,REC,4P5W,MG,508,3P220V |
| DS3508FRAB0 | 鍒堕€犲晢:Thomas & Betts 鍔熻兘鎻忚堪:MAXGARD - RR8F |
| DS3508MP000 | 鍒堕€犲晢:Thomas & Betts 鍔熻兘鎻忚堪:30A,PLG,4P5W,MG,508,3P220V |
| DS3508MR000 | 鍒堕€犲晢:Thomas & Betts 鍔熻兘鎻忚堪:30A,NLT,4P5W,MG,508,3P220V |
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