參數(shù)資料
型號: DS26503L+
廠商: Maxim Integrated Products
文件頁數(shù): 63/122頁
文件大?。?/td> 0K
描述: IC T1/E1/J1 BITS ELEMENT 64-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 160
類型: BITS 元件,多路復(fù)用器
PLL:
主要目的: T1/E1
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 6.312MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
DS26503 T1/E1/J1 BITS Element
45 of 122
Table 8-1. T1 Alarm Criteria
ALARM
SET CRITERIA
CLEAR CRITERIA
Blue Alarm (AIS) (Note 1)
Over a 3ms window, five or
fewer zeros are received
Over a 3ms window, six or more zeros
are received
Yellow Alarm (RAI)
D4 Bit-2 Mode (T1RCR2.0 = 0)
D4 12th F-bit Mode (T1RCR2.0
= 1; this mode is also referred to
as the “Japanese Yellow Alarm”)
ESF Mode
Bit 2 of 256 consecutive
channels is set to zero for at
least 254 occurrences
12th framing bit is set to one
for two consecutive
occurrences
16 consecutive patterns of
00FF appear in the FDL
Bit 2 of 256 consecutive channels is
set to zero for less than 254
occurrences
12th framing bit is set to zero for two
consecutive occurrences
14 or fewer patterns of 00FF hex out of
16 possible appear in the FDL
Red Alarm (RLOS) (Also
referred to as Loss Of Signal)
192 consecutive zeros are
received
14 or more ones out of 112 possible bit
positions are received, starting with the
first one received
Note: The definition of Blue Alarm (or Alarm Indication Signal) is an unframed, all-ones signal. Blue Alarm detectors should be able to
operate properly in the presence of a 10E-3 error rate, and they should not falsely trigger on a framed, all-ones signal. The Blue Alarm
criteria in the DS26503 has been set to achieve this performance.
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