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參數(shù)資料
| 型號(hào)： | DS2505P/T&R |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Programmable ROM |
| 英文描述： | 16K X 1 OTPROM, PDSO6 |
| 封裝： | TSOC-6 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 525K |
| 代理商： | DS2505P/T&R |
DS2505
24 of 24
NOTES:
1. All voltages are referenced to ground.
2. VPUP = external pullup voltage. If VPUP is lower than 3.0V the first byte read (any read command)
may not reproduce the correct memory contents. Therefore, under low voltage conditions, it is
recommended to set either the most significant bit or all five most significant bits of TA2 to 1.
Internal circuitry of the chip will force these 5 bits back to 0 before they are shifted in the address
counter and CRC generator.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1 s of this falling edge and will remain valid for 14 s minimum.
(15 s total from falling edge on 1-Wire bus.)
6. VIH is a function of the external pullup resistor and VPUP.
7. 30 nanocoulombs per 72 time slots @ 5.0V.
8. At VCC=5.0V with a 5 k
pullup to VCC and a maximum time slot of 120 s.
9. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 k
resistor is used to
pull up the data line to VCC, 5 s after power has been applied the parasite capacitance will not affect
normal communications.
10. Under certain low voltage conditions VILMAX may have to be reduced to as much as 0.5V to always
guarantee a presence pulse.
11. Operational temperature range for memory programming is -40
°C to +50°C.
12. For read-data time slots the optimal sampling point for the master is as close as possible to the end of
the tRDV period without exceeding the 15 s window. For the case of a read-one time slot, this
maximizes the amount of time for the pull-up resistor to recover the line to a high land. For a read-
zero time slot it ensures that a read will occur before the fastest 1-Wire device releases the line
(tRELEASE = 0)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2505 | 16K X 1 OTPROM, PBCY3 |
| DS2506S | 64K X 1 OTPROM, PDSO8 |
| DS2506 | 64K X 1 OTPROM, PBCY3 |
| DS275E | LINE TRANSCEIVER, PDSO14 |
| DS275 | LINE TRANSCEIVER, PDIP8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2505PTR | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:16-kbit Add-Only Memory |
| DS2505P-UNW | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
| DS2505P-UNW-1154 | 制造商:Maxim Integrated Products 功能描述: |
| DS2505P-UNW-PPPP | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
| DS2505T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:16-kbit Add-Only Memory |
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