參數(shù)資料
型號: DS2433-Z01
英文描述: 4K-Bit 1-Wire EEPROM
中文描述: 4k位1-Wire EEPROM
文件頁數(shù): 6/19頁
文件大?。?/td> 588K
代理商: DS2433-Z01
DS2433
6 of 19
DS2433 MEMORY MAP
Figure 5
ADDRESS REGISTER
Figure 6
READ MEMORY [F0H]
The read memory command may be used to read the entire memory. After issuing the command, the
master must provide the 2-byte target address. After the two bytes, the master reads data beginning from
the target address and may continue until the end of memory, at which point logic 1’s will be read. It is
important to realize that the target address registers will contain the address provided. The ending
offset/data status byte is unaffected.
The hardware of the DS2433 provides a means to accomplish error-free writing to the memory section.
To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers, it is
recommended to packetize data into data packets of the size of one memory page each. Such a packet
would typically store a 16-bit CRC with each page of data to insure rapid, error-free data transfers that
eliminate having to read a page multiple times to determine if the received data is correct or not. (See the
Book of DS19xx iButton Standards, Chapter 7 or Application Note 114 for the recommended file
structure.)
32-BIT INTERMEDIATE STORAGE SCRATCHPAD
32-BYTE FINAL STORAGE EEPROM
32-BYTE FINAL STORAGE EEPROM
FINAL STORAGE EEPROM
32-BYTE FINAL STORAGE EEPROM
ADDRESS
0000H TO
001FH
003FH
01DFH
01FFH
0020H TO
0040H TO
1FE0H TO
PAGE 0
PAGE 1
PAGE 2
TO PAGE 14
PAGE 15
T7
T6
T5
T4
T3
T2
T1
T0
T15
AA
1)
PF
E4
E3
E2
E1
E0
T14 T13 T12 T11 T10
T9
T8
TARGET ADDRESS (TA1)
TARGET ADDRESS (TA2)
ENDING ADDRESS WITH
DATA STATUS (E/S)
(READ ONLY)
1) THIS BIT WILL ALWAYS BE 0.
相關(guān)PDF資料
PDF描述
DS2433S 4k-Bit 1-Wire EEPROM
DS2433T 4k-Bit 1-Wire EEPROM
DS2433X 4k-Bit 1-Wire EEPROM
DS2433Y 4k-Bit 1-Wire EEPROM
DS2434 Battery Identification Chip
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