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| 型號： | DS21Q58L |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 42/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX E1 QUAD 3.3V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 收發(fā)器 |
| 接口： | E1 |
| 電路數(shù)： | 4 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 電流 - 電源： | 230mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 包括： | AIS 警報檢測器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測器，遠(yuǎn)程檢測器和發(fā)生器 |
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DS21Q58 E1 Quad Transceiver
47 of 74
21.
LINE INTERFACE UNIT
The line interface unit contains three sections: the receiver, which handles clock and data recovery; the transmitter,
which waveshapes and drives the E1 line; and the jitter attenuator. The line interface control register (LICR),
described below, controls each of these three sections.
Register Name:
LICR
Register Description:
Line Interface Control Register
Register Address:
17 Hex
Bit #
7
6
5
4
3
2
1
0
Name
L2
L1
L0
—
JAS
JABDS
DJA
TPD
NAME
BIT
FUNCTION
L2
7
Line Build-Out Select Bit 2. Sets the transmitter build-out.
L1
6
Line Build-Out Select Bit 1. Sets the transmitter build-out.
L0
5
Line Build-Out Select Bit 0. Sets the transmitter build-out.
—
4
Unused. Should be set = 0 for proper operation.
JAS
3
Jitter Attenuator Select
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
JABDS
2
Jitter Attenuator Buffer Depth Select
0 = 128 bits
1 = 32 bits (use for delay-sensitive applications)
DJA
1
Disable Jitter Attenuator
0 = jitter attenuator enabled
1 = jitter attenuator disabled
TPD
0
Transmit Power-Down
0 = powers down the transmitter and tri-states the TTIP and TRING pins
1 = normal transmitter operation
21.1 Receive Clock and Data Recovery
The DS21Q58 contains a digital clock recovery system. (See Figure 3-1 and Figure 21-2 for more details.) The
device couples to the receive E1 shielded twisted pair or coax through a 1:1 transformer (Table 21-3). The
2.048MHz clock attached at the MCLK pin is internally multiplied by 16 through an internal PLL and fed to the clock
recovery system. The clock recovery system uses the clock from the PLL circuit to form a 16 times oversampler,
which is used to recover the clock and data. This oversampling technique offers outstanding jitter tolerance
Normally, RCLK is the recovered clock from the E1 AMI/HDB3 waveform presented at the RTIP and RRING inputs.
When no AMI signal is present at RTIP and RRING, an RCL condition occurs and the RCLK is sourced from the
clock applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled, RCLK can
exhibit slightly shorter high cycles of the clock. This is because of the highly oversampled digital clock recovery
circuitry. If the jitter attenuator is placed in the receive path (as is the case in most applications), the jitter attenuator
restores the RCLK to being close to 50% duty cycle. See Receive AC Characteristics in Section 26.4 for more
details.
21.1.1 Termination
The DS21Q58 is designed to be fully software-selectable for 75
W and 120W termination without the need to change
any external resistors. The user can configure the DS21Q58 for 75
W or 120W receive termination by setting the
IRTSEL (CCR5.4) bit. When using the internal termination feature, the external termination resistance should be
120
W (typically two 60W resistors). Setting IRTSEL = 1 causes the DS21Q58 to internally apply parallel resistance
to the external resistors to adjust the termination to 75
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q58L+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q58LN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q58LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q59 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:RELIABILITY REPORT FOR DS21Q59, REV A2 |
| DS21Q59DK | 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS21Q59 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
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