參數(shù)資料
型號: DS21Q348
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, PBGA144
封裝: BGA-144
文件頁數(shù): 21/67頁
文件大?。?/td> 339K
代理商: DS21Q348
DS21348/Q348
28 of 67
Table 6-5 INTERNAL RX TERMINATION SELECT
RT1
(CCR5.1)
RT0
(CCR5.0)
INTERNAL RECEIVE
TERMINATION CONFIGURATION
0
Internal receive-side termination disabled
01
Internal receive-side 120
enabled
10
Internal receive-side 100
enabled
11
Internal receive-side 75
enabled
CCR6 (05H): COMMON CONTROL REGISTER 6
(MSB)
(LSB)
LLB
RLB
ARLBE
ALB
RJAB
ECRS2
ECRS1
ECRS0
SYMBOL
POSITION
NAME AND DESCRIPTION
LLB
CCR6.7
Local LoopBack. In Local Loopback (LLB), transmit data will
be looped back to the receive path passing through the jitter
attenuator if it is enabled.
Data in the transmit path will act as
normal. See Figure 3-1 for details.
0 = loopback disabled
1 = loopback enabled
RLB
CCR6.6
Remote LoopBack. In Remote Loopback (RLB), data output
from the clock/data recovery circuitry will be looped back to the
transmit path passing through the jitter attenuator if it is
enabled. Data in the receive path will act as normal while data
presented at TPOS and TNEG will be ignored.
See Figure
3-1for details.
0 = loopback disabled
1 = loopback enabled
ARLBE
CCR6.5
Automatic Remote LoopBack Enable & Reset.
When this
bit is set high, the device will automatically go into remote
loopback when it detects loop up code programmed into the
Receive Loop Up Code Definition Registers (RUPCD1 and
RUPCD2) for a minimum of 5 seconds and it will also set the
RIR2.1 status bit. Once in a RLB state, it will remain in this
state until it has detected the loop code programmed into the
Receive Loop Down Code Definition Registers (RDNCD1 and
RDNCD2) for a minimum of 5 seconds at which point it will
force the device out of RLB and clear RIR2.1. The automatic
RLB circuitry can be reset by toggling this bit from a 1 to a 0.
The action of the automatic remote loopback circuitry is
logically OR’ed with the RLB (CCR6.6) control bit (i.e. either
one can cause a RLB to occur).
ALB
CCR6.4
Analog LoopBack.
In Analog Loopback (ALB), signals at
TTIP and TRING will be internally connected to RTIP and
RRING.
The incoming signals, from the line, at RTIP and
RRING will be ignored. The signals at TTIP and TRING will
be transmitted as normal. See Figure 3-1for more details.
0 = loopback disabled
1 = loopback enabled
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