參數(shù)資料
型號: DS1986-F3
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Programmable ROM
英文描述: 64K X 1 OTPROM, MEDB2
封裝: MICROCAN-2
文件頁數(shù): 16/28頁
文件大?。?/td> 680K
代理商: DS1986-F3
DS1986
23 of 28
READ/WRITE TIMING DIAGRAM Figure 10 (cont.)
Read-data Time Slot
Regular Speed
Overdrive Speed
60
μs ≤ tSLOT < 120 μs
6
μs ≤ tSLOT < 16 μs
1
μs ≤ tLOWR < 15 μs
1
μs ≤ tLOWR < 2 μs
0
≤ tRELEASE < 45 μs
0
≤ tRELEASE < 4 μs
1
μs ≤ tREC < ∞
1
μs ≤ tREC < ∞
tRDV = 15 μs
tRDV = 2 μs
tSU < 1 μs
PROGRAM PULSE TIMING DIAGRAM Figure 11
CRC GENERATION
With the DS1986 there are two different types of CRCs (Cyclic Redundancy Checks). One CRC is an 8-
bit type and is stored in the most significant byte of the 64-bit ROM. The bus master can compute a CRC
value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS1986 to
determine if the ROM data has been received error-free by the bus master. The equivalent polynomial
function of this CRC is: X8 + X5 + X4 + 1. This 8-bit CRC is received in the true (non-inverted) form when
reading the ROM of the DS1986. It is computed once at the factory and lasered into the ROM.
RESISTOR
MASTER
DS1986
tDP
tPP
tDP
LINE TYPE LEGEND:
Bus master active high
(12V @ 10 mA)
Resistor pull-up
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