參數(shù)資料
型號: DS1986-F3
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Programmable ROM
英文描述: 64K X 1 OTPROM, MEDB2
封裝: MICROCAN-2
文件頁數(shù): 13/28頁
文件大小: 680K
代理商: DS1986-F3
DS1986
20 of 28
Overdrive Skip ROM [3CH]
On a single-drop bus this command can save time by allowing the bus master to access the memory
functions without providing the 64-bit ROM code. Unlike the normal Skip ROM command the Overdrive
Skip ROM sets the DS1986 in the Overdrive Mode (OD=1). All communication following this command
has to occur at Overdrive Speed until a reset pulse of minimum 480
μs duration resets all devices on the
bus to regular speed (OD=0).
When issued on a multidrop bus this command will set all Overdrive-capable devices into Overdrive
mode. To subsequently address a specific Overdrive-capable device, a reset pulse at Overdrive speed has
to be issued followed by a Match ROM or Search ROM command sequence. This will shorten the time
for the search process. If more than one slave supporting Overdrive is present on the bus and the
Overdrive Skip ROM command is followed by a read command, data collision will occur on the bus as
multiple slaves transmit simultaneously (open drain pull-downs will produce a wired-AND result).
Overdrive Match ROM [69H]
The Overdrive Match ROM command, followed by a 64-bit ROM sequence transmitted at Overdrive
Speed, allows the bus master to address a specific DS1986 on a multidrop bus and to simultaneously set it
in Overdrive Mode. Only the DS1986 that exactly matches the 64-bit ROM sequence will respond to the
subsequent memory function command. Slaves already in Overdrive mode from a previous Overdrive
Skip or Match command will remain in Overdrive mode. All other slaves that do not match the 64-bit
ROM sequence or do not support Overdrive will return to or remain at regular speed and wait for a reset
pulse of minimum 480
μs duration. The Overdrive Match ROM command can be used with a single or
multiple devices on the bus.
1-Wire Signaling
The DS1986 requires strict protocols to ensure data integrity. The protocol consists of five types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, Read Data
and Program Pulse. All these signals except presence pulse are initiated by the bus master. The DS1986
can communicate at two different speeds, regular speed and Overdrive Speed. If not explicitly set into the
Overdrive Mode, the DS1986 will communicate at regular speed. While in Overdrive Mode the fast
timing applies to all communication-related waveforms.
The initialization sequence required to begin any communication with the DS1986 is shown in Figure 9.
A Reset Pulse followed by a Presence Pulse indicates the DS1986 is ready to accept a ROM command.
The bus master transmits (TX) a reset pulse (tRSTL, minimum 480 μs at regular speed, 48 μs at Overdrive
Speed). The bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled
to a high state via the pull-up resistor. After detecting the rising edge on the data pin, the DS1986 waits
(tPDH , 15-60 μs at regular speed, 2-6 μs at overdrive speed) and then transmits the presence pulse (tPDL ,
60-240
μs at regular speed, 8-24 μs at Overdrive Speed).
A Reset Pulse of 480
μs or longer will exit the Overdrive Mode returning the device to regular speed. If
the DS1986 is in Overdrive Mode and the Reset Pulse is no longer than 80
μs the device will remain in
Overdrive Mode.
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