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參數(shù)資料
| 型號： | DS17887-5 |
| 英文描述： | Real-Time Clock |
| 中文描述： | 實時時鐘 |
| 文件頁數(shù)： | 18/38頁 |
| 文件大?。?/td> | 515K |
| 代理商： | DS17887-5 |
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DS17885/DS17887
18 of 38
Also at this time, the Kickstart Flag (KF, bank 1, register 04AH) will be set, indicating that a kickstart
condition has occurred.
The timing associated with both the wake-up and kickstarting sequences is illustrated in the Wake-Up /
Kickstart Timing Diagram in the Electrical Specifications section of this data sheet. The timing
associated with these functions is divided into 5 intervals, labeled 1-5 on the diagram.
The occurrence of either a kickstart or wake-up condition will cause the
PWR
pin to be driven low, as
described above. During interval 1, if the supply voltage on the DS17885/DS17887 V
CC
pin rises above
the greater of V
BAT
or V
PF
before the power on timeout period (t
POTO
) expires, then PWR will remain at
the active low level. If V
CC
does not rise above the greater of V
BAT
or V
PF
in this time, then the
PWR
output pin will be turned off and will return to its high impedance level. In this event, the
IRQ
pin will
also remain tri-stated. The interrupt flag bit (either WF or KF) associated with the attempted power on
sequence will remain set until cleared by software during a subsequent system power on.
If V
CC
is applied within the timeout period, then the system power on sequence will continue as shown in
intervals 2-5 in the timing diagram. During interval 2,
PWR
will remain active and
IRQ
will be driven to
its active low level, indicating that either WF or KF was set in initiating the power on. In the diagram
KS
is assumed to be pulled up to the V
BAUX
supply. Also at this time, the PAB bit will be automatically
cleared to 0 in response to a successful power on. The
PWR
line will remain active as long as the PAB
remains cleared to 0.
At the beginning of interval 3, the system processor has begun code execution and clears the interrupt
condition of WF and/or KF by writing 0’s to both of these control bits. As long as no other interrupt
within the DS17885/DS17887 is pending, the
IRQ
line will be taken inactive once these bits are reset.
Execution of the application software may proceed. During this time, both the wake-up and kickstart
functions may be used to generate status and interrupts. WF will be set in response to a date, hours,
minutes, and seconds match condition. KF will be set in response to a low going transition on
KS
. If the
associated interrupt enable bit is set (WIE and/or KSE) then the
IRQ
line will driven active low in
response to enabled event. In addition, the other possible interrupt sources within the DS17885/DS17887
may cause
IRQ
to be driven low. While system power is applied, the on chip logic will always attempt to
drive the
PWR
pin active in response to the enabled kickstart or wake-up condition. This is true even if
PWR
was previously inactive as the result of power being applied by some means other than wake-up or
kickstart.
The system may be powered down under software control by setting the PAB bit to a logic 1. This causes
the open-drain
PWR
pin to be placed in a high impedance state, as shown at the beginning of interval 4 in
the timing diagram. As V
CC
voltage decays, the
IRQ
output pin will be placed in a high impedance state
when V
CC
goes below V
PF
. If the system is to be again powered on in response to a wake-up or kickstart,
then the both the WF and KF flags should be cleared and WIE and/or KSE should be enabled prior to
setting the PAB bit.
During interval 5, the system is fully powered down. Battery backup of the clock calendar and
nonvolatile RAM is in effect and
IRQ
is tri-stated, and monitoring of wake-up and kickstart takes place.
If PRS=1,
PWR
stays active, otherwise if PRS=0
PWR
is tri-stated.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| DS17887-5 IND | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17887-5+ | 功能描述:實時時鐘 3V/5V RTC RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17887-5IND | 功能描述:IC RTC 5V 8K NV RAM 24-EDIP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應商設備封裝:8-TDFN EP 包裝:管件 |
| DS17887-5IND+ | 功能描述:實時時鐘 3V/5V RTC RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17H531D | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:3-PHASE STEPPING SYSTEMS |
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