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參數(shù)資料
| 型號： | DS17285EN-3 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Timer or RTC |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | TSOP-28 |
| 文件頁數(shù)： | 7/38頁 |
| 文件大?。?/td> | 415K |
| 代理商： | DS17285EN-3 |
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DS17285/DS17287
15 of 38
UPDATE CYCLE
The Serialized RTC executes an update cycle once per second regardless of the SET bit in Register B.
When the SET bit in Register B is set to one, the user copy of the double-buffered time, calendar, alarm
and elapsed time byte is frozen and will not update as the time increments. However, the time countdown
chain continues to update the internal copy of the buffer. This feature allows the time to maintain
accuracy independent of reading or writing the time, calendar, and alarm buffers and also guarantees that
time and calendar information is consistent. The update cycle also compares each alarm byte with the
corresponding time byte and issues an alarm if a match or if a “don’t care” code is present in all alarm
locations.
There are three methods that can handle access of the real-time clock that avoid any possibility of
accessing inconsistent time and calendar data. The first method uses the update-ended interrupt. If
enabled, an interrupt occurs after every update cycle that indicates that over 999 ms are available to read
valid time and date information. If this interrupt is used, the IRQF bit in Register C should be cleared
before leaving the interrupt routine.
A second method uses the update-in-progress bit (UIP) in Register A to determine if the update cycle is in
progress. The UIP bit will pulse once per second. After the UIP bit goes high, the update transfer occurs
244
s later. If a low is read on the UIP bit, the User has at least 244 s before the time/calendar data
will be changed. Therefore, the User should avoid interrupt service routines that would cause the time
needed to read valid time/calendar data to exceed 244 s.
The third method uses a periodic interrupt to determine if an update cycle is in progress. The UIP bit in
Register A is set high between the setting of the PF bit in Register C (see Figure 3). Periodic interrupts
that occur at a rate of greater than t BUC allow valid time and date information to be reached at each
occurrence of the periodic interrupt. The reads should be complete within (tPI/ 2+tBUC) to ensure that data
is not read during the update cycle.
UPDATE-ENDED AND PERIODIC INTERRUPT RELATIONSHIP Figure 3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS17285S-3 | 1 TIMER(S), REAL TIME CLOCK, PDSO24 |
| DS1742-100 | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
| DS1742W-120 | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
| DS1742-70 | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
| DS1742W-150 | 0 TIMER(S), REAL TIME CLOCK, DMA24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS17285EN-3+ | 功能描述:實(shí)時(shí)時(shí)鐘 3V/5V RTC K Multiplexed Kick-S RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS17285EN-5 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock |
| DS17285N-3 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock |
| DS17285N5 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Real-Time Clocks |
| DS17285N-5 | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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