參數(shù)資料
型號: DS1689SN+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 4/36頁
文件大?。?/td> 0K
描述: IC RTC SER NV RAM CTRL IN 28SOIC
標(biāo)準(zhǔn)包裝: 1,000
類型: 時鐘/日歷
特點: NVSRAM
存儲容量: 114B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 2.7 V ~ 3.3 V,4.5 V ~ 5.5 V
電壓 - 電源,電池: 2.5 V ~ 3.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
包裝: 帶卷 (TR)
DS1689/DS1693
12 of 36
Table 2. Periodic Interrupt Rate and Square-Wave Output Frequency
EXT. REG. B
SELECT BITS REGISTER A
E32K
RS3
RS2
RS1
RS0
tPI PERIODIC
INTERRUPT RATE
SQW OUTPUT
FREQUENCY
0
None
0
1
3.90625ms
256Hz
0
1
0
7.8125ms
128Hz
0
1
122.070
s
8.192kHz
0
1
0
244.141
s
4.096kHz
0
1
0
1
488.281
s
2.048kHz
0
1
0
976.5625
s
1.024kHz
0
1
1.953125ms
512Hz
0
1
0
3.90625ms
256Hz
0
1
0
1
7.8125ms
128Hz
0
1
0
1
0
15.625ms
64Hz
0
1
0
1
31.25ms
32Hz
0
1
0
62.5ms
16Hz
0
1
0
1
125ms
8Hz
0
1
0
250ms
4Hz
0
1
500ms
2Hz
1
X
(See Note)
32.768kHz
Note: RS3–RS0 determine periodic interrupt rates as listed for E32K = 0.
The third method uses a periodic interrupt to determine if an update cycle is in progress. The UIP bit in
Register A is set high between the setting of the PF bit in Register C (see Figure 3). Periodic interrupts
that occur at a rate of greater than tBUC allow valid time and date information to be reached at each
occurrence of the periodic interrupt. The reads should be complete within (tPI / 2 + tBUC) to ensure that
data is not read during the update cycle.
Figure 3. Update-Ended and Periodic Interrupt Relationship
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