參數(shù)資料
型號: DS1501Y
英文描述: Real-Time Clock
中文描述: 實時時鐘
文件頁數(shù): 9/30頁
文件大小: 291K
代理商: DS1501Y
DS1501/DS1511
9 of 30
TIE - Time of Day/Date Alarm Interrupt Enable Bit
(0FH bit 3)
The TIE bit allows the TDF Flag to assert an Interrupt. When the TDF flag bit is set to a "1", if TIE is a
"1", the IRQF flag bit will be set to a "1". Writing a "0" to the TIE bit will prevent the TDF flag from
setting the IRQF flag. This bit is automatically cleared to a logic “0” to by the internal Power on Reset
when power is applied and Vcc rises above the Power-fail Voltage.
KIE - Kickstart Enable Interrupt Bit
(0FH bit 2)
The KIE bit allows the KSF Flag to assert an interrupt. When the KSF flag bit is set to a “1”, if KIE is a
“1”, the IRQF flag bit will be set to a “1”. Writing a “0” to the KIE bit will prevent the KSF flag from
setting the IRQF flag. This bit is automatically cleared to a logic “0” to by the internal Power on Reset
when power is applied and Vcc rises above the Power-fail Voltage.
WDE - Watchdog Enable Bit
(0FH bit 1)
When WDE is set to a "1", the Watchdog function is enabled and either the
IRQ
or
RST
pin will be pulled
active based on the state of the WDS bit. This bit is automatically cleared to a logic “0” to by the internal
Power on Reset when power is applied and Vcc rises above the Power-fail Voltage.
WDS - Watchdog Steering Bit
(0FH bit 0)
If WDS is a "0" when the Watchdog Flag Bit WDF is set to a "1", the
IRQ
pin will be pulled low. If
WDS is a "1" when WDF is set to a "1", the watchdog will output a negative pulse on the
RST
output for
a duration of 40 ms to 200 ms and the ‘IRQF’ flag will be set when the watchdog times out. The WDE
bit will reset to a "0" immediately after
RST
goes active. This bit is automatically cleared to a logic “0”
to by the internal Power on Reset when power is applied and Vcc rises above the Power-fail Voltage.
CLOCK OSCILLATOR CONTROL
The Clock oscillator may be stopped at any time. To increase the shelf life of a backup lithium battery
source, the oscillator can be turned off to minimize current drain from the battery. The
EOSC
bit is used
to control state of the oscillator, and must be set to a "0" for the oscillator to function.
READING THE CLOCK
When reading the clock and calendar data, it is recommended to halt updates to the external set of double
buffered RTC registers. This puts the external registers into a static state allowing data to be read without
register values changing during the read process. Normal updates to the internal registers continue while
in this state. External updates are halted when a ”0” is written into the Transfer Enable, TE, bit of
Control register B (0Fh). As long as a “0” remains in the Control register B (TE) bit, updating is halted.
After a halt is issued, the registers reflect the RTC count (day, date, and time) that was current at the
moment the halt command was issued. Normal updates to the external set of registers will resume within
1 second after the (TE) bit is set to a “1”.
SETTING THE CLOCK
It is also recommended to halt updates to the external set of double buffered RTC registers when writing
to the clock. The (TE) bit should be used as described above before loading the RTC registers with the
desired RTC count (day, date, and time) in 24-hour BCD format. Setting the (TE) bit to a “1” will
transfer the new values written, to the internal RTC registers and allow normal operation to resume.
相關PDF資料
PDF描述
DS1501YE Real-Time Clock
DS1501YS Real-Time Clock
DS1501 Y2K-Compliant Watchdog Real-Time Clocks
DS1511 Y2K-Compliant Watchdog Real-Time Clocks
DS1501-DS1511 Y2K-Compliant Watchdog Real-Time Clocks
相關代理商/技術參數(shù)
參數(shù)描述
DS1501Y+ 功能描述:實時時鐘 Y2K-Compliant Watchdog RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
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