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參數(shù)資料
| 型號： | DS1375T+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC SERIAL W/ALARM 6TDFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，方波輸出，涓流充電器 |
| 存儲(chǔ)容量： | 16B |
| 時(shí)間格式： | HH:MM:SS（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 1.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-WDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 6-TDFN 裸露焊盤（3x3） |
| 包裝： | 帶卷 (TR) |
DS1375
I2C Digital Input RTC with Alarm
8
_____________________________________________________________________
Table 2. Alarm Mask Bits
ALARM 1 REGISTER
MASK BITS (BIT 7)
DY/DT
A1M
ALARM RATE
X
1
Alarm once per
second
X
1
0
Alarm when seconds
match
X
1
0
Alarm when minutes
and seconds match
X
1
0
Alarm when hours,
minutes, and
seconds match
0
Alarm when date,
hours, minutes, and
seconds match
1
0
Alarm when day,
hours, minutes, and
seconds match
ALARM 2
REGISTER MASK
BITS (BIT 7)
DY/DT
A2M
ALARM RATE
X
1
Alarm once per minute
(00 seconds of every min)
X
1
0
Alarm when minutes match
X
1
0
Alarm when hours and
minutes match
0
Alarm when date, hours, and
minutes match
1
0
Alarm when day, hours, and
minutes match
Alarms
The DS1375 contains two time-of-day/date alarms.
Alarm 1 can be set by writing to registers 07h–0Ah.
Alarm 2 can be set by writing to registers 0Bh–0Dh.
The alarms can be programmed (by the alarm enable
and INTCN bits of the control register) to activate the
SQW/INT output on an alarm match condition. Bit 7 of
the time-of-day/date alarm registers are mask bits
(Table 2). When all the mask bits for each alarm are
logic 0, an alarm only occurs when the values in the
timekeeping registers match the corresponding values
stored in the time-of-day/date alarm registers. The
alarms can also be programmed to repeat every sec-
ond, minute, hour, day, or date. Table 2 shows the pos-
sible settings. Configurations not listed in the table
result in illogical operation.
The DY/DT bits (bit 6 of the alarm day/date registers)
control whether the alarm value stored in bits 0–5 of
that register reflects the day of the week or the date of
the month. If DY/DT is written to logic 0, the alarm is the
result of a match with date of the month. If DY/DT is
written to logic 1, the alarm is the result of a match with
day of the week.
When the RTC register values match alarm register set-
tings, the corresponding alarm flag A1F or A2F bit is
set to logic 1. If the corresponding alarm interrupt
enable A1IE or A2IE is also set to logic 1, and the
INTCN bit is set to logic 1, the alarm condition activates
the SQW/INT signal. The match is tested on the once-
per-second update of the time and date registers.
Special Purpose Registers
The DS1375 has two additional registers (control and
status) that control the RTC, alarms, and square-wave
output.
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