參數(shù)資料
型號: DS1307N
英文描述: 64 X 8 Serial Real Time Clock
中文描述: 64 × 8串行實(shí)時(shí)時(shí)鐘
文件頁數(shù): 6/11頁
文件大?。?/td> 165K
代理商: DS1307N
DS1307
6 of 11
Acknowledge:
Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse which is associated with
this acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end of data to the slave
by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the master to generate the STOP condition.
DATA TRANSFER ON 2-WIRE SERIAL BUS
Figure 5
Depending upon the state of the R/
W
bit, two types of data transfer are possible:
1.
Data transfer from a master transmitter to a slave receiver.
The first byte transmitted by the
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte. Data is transferred with the most significant bit (MSB) first.
2.
Data transfer from a slave transmitter to a master receiver.
The first byte (the slave address) is
transmitted by the master. The slave then returns an acknowledge bit. This is followed by the slave
transmitting a number of data bytes. The master returns an acknowledge bit after all received bytes
other than the last byte. At the end of the last received byte, a ’not acknowledge’ is returned.
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released. Data is transferred
with the most significant bit (MSB) first.
相關(guān)PDF資料
PDF描述
DS1307Z 64 X 8 Serial Real Time Clock
DS1307ZN 64 X 8 Serial Real Time Clock
DS1310
DS1311
DS1312S Nonvolatile Controller
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