
DS1305
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The DS1305 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is
the AM/PM bit with logic high being PM.
In the 24-hour mode, bit 5 is the second 10-hour bit
(20-23hours).
The DS1305 contains two time of day alarms. Time of Day Alarm 0 can be set by writing to registers
87h to 8Ah. Time of Day Alarm 1 can be set by writing to registers 8Bh to 8Eh. The alarms can be
programmed (by the INTCN bit of the Control Register) to operate in two different modes - each alarm
can drive its own separate interrupt output or both alarms can drive a common interrupt output. Bit 7 of
each of the time of day alarm registers are mask bits (Table 1). When all of the mask bits are logic 0, a
time of day alarm will only occur once per week when the values stored in timekeeping registers 00h to
03h match the values stored in the time of day alarm registers. An alarm will be generated every day
when bit 7 of the day alarm register is set to a logic 1. An alarm will be generated every hour when bit 7
of the day and hour alarm registers is set to a logic 1. Similarly, an alarm will be generated every minute
when bit 7 of the day, hour and minute alarm registers is set to a logic 1. When bit 7 of the day, hour,
minute and seconds alarm registers is set to a logic 1, alarm will occur every second.
TIME OF DAY ALARM MASK BITS Table 1
ALARM REGISTER MASK BITS (BIT 7)
SECONDS
MINUTES
HOURS
DAYS
1
Alarm once per second
0
1
Alarm when seconds match
0
1
Alarm when minutes and seconds match
0
1
Alarm hours, minutes and seconds match
0
Alarm day, hours, minutes and seconds match
SPECIAL PURPOSE REGISTERS
The DS1305 has three additional registers (Control Register, Status Register and Trickle Charger
Register) that control the real time clock, interrupts and trickle charger.
CONTROL REGISTER (READ 0FH, WRITE 8FH)
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
EOSC
WP
0
INTCN
AIE1
AIE0
EOSC
(Enable oscillator) - This bit when set to logic 0 will start the oscillator. When this bit is set to a
logic 1, the oscillator is stopped and the DS1305 is placed into a low-power standby mode with a current
drain of less than 100 nanoamps when power is supplied by VBAT or VCC2. The initial power on state is
not defined.
WP (Write Protect) - Before any write operation to the clock or RAM, this bit must be logic 0. When
high, the write protect bit prevents a write operation to any register, including bits 0, 1, 2 and 7 of the
control register. Upon initial power up, the state of the WP bit is undefined. Therefore the WP bit should
be cleared before attempting to write to the device. When WP is set, it must be cleared before any other
control register bit can be written.