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參數(shù)資料
| 型號(hào)： | DS1248YP-70 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | Timer or RTC |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, DMA34 |
| 封裝： | POWERCAP, MODULE-34 |
| 文件頁(yè)數(shù)： | 9/18頁(yè) |
| 文件大小： | 398K |
| 代理商： | DS1248YP-70 |
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DS1248/DS1248P 1024k NV SRAM with Phantom Clock
17 of 18
AC TEST CONDITIONS
Output Load: 50pF + 1TTL Gate
Input Pulse Levels: 0 to 3V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
NOTES:
1)
WE is high for a read cycle.
2)
OE = VIH or VIL. If CE = VIH during write cycle, the output buffers remain in a high impedance state.
3) tWP is specified as the logical AND of CE and WE. tWP is measured from the latter of CE or WE going
low to the earlier of
CE or WE going high.
4) tDH, tDS are measured from the earlier of CE or WE going high.
5) These parameters are sampled with a 50pF load and are not 100% tested.
6) If the
CE low transition occurs simultaneously with or later than the WE low transition in Write Cycle
1, the output buffers remain in a high-impedance state during this period.
7) If the
CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in a high-impedance state during this period.
8) If
WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high impedance state during this period.
9) The expected tDR is defined as cumulative time in the absence of VCC with the clock oscillator
running.
10) tWR is a function of the latter occurring edge of WE or CE.
11) Voltages are referenced to ground.
12)
RST (Pin 1) has an internal pullup resistor.
13) RTC modules can be successfully processed through conventional wave-soldering techniques as long
as temperature exposure to the lithium energy source contained within does not exceed +85°C. Post-
solder cleaning with water-washing techniques is acceptable, provided that ultrasonic vibration is not
used. See the PowerCap package drawing for details regarding the PowerCap package.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1248W-120 | REAL TIME CLOCK, PDIP32 |
| DS1248WP-120 | REAL TIME CLOCK, DMA34 |
| DS1250ABP-70 | 512K X 8 NON-VOLATILE SRAM MODULE, 70 ns, DMA34 |
| DS1250AB-100 | 512K X 8 NON-VOLATILE SRAM MODULE, 100 ns, DIP32 |
| DS1250Y-100 | 512K X 8 NON-VOLATILE SRAM MODULE, 100 ns, DIP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1248YP-70+ | 功能描述:實(shí)時(shí)時(shí)鐘 1024k NV SRAM w/Phantom Clock RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1248YP70IND | 制造商:DALLAS 制造商全稱(chēng):Dallas Semiconductor 功能描述:1024k NV SRAM with Phantom Clock |
| DS1249AB | 制造商:DALLAS 制造商全稱(chēng):Dallas Semiconductor 功能描述:2048k Nonvolatile SRAM |
| DS1249AB100 | 制造商:DALLAS 制造商全稱(chēng):Dallas Semiconductor 功能描述:2048k Nonvolatile SRAM |
| DS1249AB-100 | 功能描述:NVRAM 2048K NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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