參數(shù)資料
型號: DS1220Y-150
廠商: DALLAS SEMICONDUCTOR
元件分類: Static RAM
英文描述: 2K X 8 NON-VOLATILE SRAM MODULE, 150 ns, PDIP24
封裝: 0.720 INCH, EXTENDED, DIP-24
文件頁數(shù): 6/8頁
文件大?。?/td> 144K
代理商: DS1220Y-150
DS1220Y
6 of 8
POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
CE at VIH before Power-Down
tPD
0
s
11
VCC Slew from VTP to 0V
tF
100
s
VCC Slew from 0V to VTP
tR
0
s
CE at VIH after Power-Up
tREC
2ms
(TA = 25
°C)
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE is high for a read cycle.
2. OE = VIH or VIL . If OE = VIH during a write cycle, the output buffers remain in a high impedance
state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDS are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or later than the WE low transition in write
cycle 1, the output buffers remain in a high impedance state during this period.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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DS1220Y-150-IND 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based)
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DS1220Y-200-IND 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based)