:DAT
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� DS1077Z-66+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 9/21闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC ECONOSCILLATOR 66.7MHZ 8SOIC
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 100
绯诲垪锛� EconOscillator™
椤�(l猫i)鍨嬶細 鎸暕鍣紝鍥哄畾闋荤巼锛堥洐璺級
闋荤巼锛� 8.1kHz ~ 66.666MHz
闆绘簮闆诲锛� 4.75 V ~ 5.25 V
闆绘祦 - 闆绘簮锛� 50mA
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
鍖呰锛� 绠′欢
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
瀹夎椤�(l猫i)鍨嬶細 琛ㄩ潰璨艰
DS1077
17 of 21
8) A fast mode device can be used in a standard mode system, but the requirement t
SU
:DAT>250ns must then
be met. This will automatically be the case if the device does not stretch the LOW period of the SCL
signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to
the SDA line t
R MAX + tSU
:DAT = 1000ns + 250ns = 1250ns before the SCL line is released.
9) C
B is the total capacitance of one bus line in pF.
10) OUT0 and OUT1 are operating at oscillator master frequency without divider.
11) Typical frequency shift due to aging is 卤0.5%. Aging stressing includes Level 3 preconditioning with
1000 temperature cycles of -55掳C to +125掳C, 336hr max VCC biased +125掳C bake. Level 3
preconditioning consists of a 24hr +125掳C storage bake, 192hr moisture soak at +30掳C/60% R.H., and
three solder reflow passes.
TIMING DIAGRAM
SU:STO
t
t SP
HD:STA
t
t SU:STA
SU:DAT
t
tHIGH
R
t
LOW
tHD:STA
SCL
START
SDA
STOP
tBUF
tF
REPEATED
START
tHD:DAT
ORDERING INFORMATION
Example:
DS1077Z-100
DS1077
Z =
SO
U =
SOP
133 = 133.333MHz
125 = 125.000MHz
120 = 120.000MHz
100 = 100.000MHz
66 =
66.666MHz
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VE-B44-IU-F4 CONVERTER MOD DC/DC 48V 200W
DS1077Z-133+ IC ECONOSCILLATOR 133.3MHZ 8SOIC
VE-B43-IU-F3 CONVERTER MOD DC/DC 24V 200W
DS1077Z-120+ IC ECONOSCILLATOR 120MHZ 8SOIC
IDTQS3257QG IC MUX/DEMUX QUAD 2:1 16QSOP
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
DS1077Z-66+ 鍔熻兘鎻忚堪:鍙法绋嬫尟钑╁櫒 EconOscillator/Dvdr 66MHz 118mil 2-Wire RoHS:鍚� 鍒堕€犲晢:IDT 灏佽 / 绠遍珨:5 mm x 7 mm x 1.5 mm 闋荤巼:15.476 MHz to 866.67, 975 MHz to 1300 MHz 闋荤巼绌�(w臎n)瀹氭€�:+/- 50 PPM 闆绘簮闆诲:3.63 V 璨�(f霉)杓夐浕瀹�:10 pF 绔帴椤�(l猫i)鍨�:SMD/SMT 杓稿嚭鏍煎紡:LVPECL 鏈€灏忓伐浣滄韩搴�:- 40 C 鏈€澶у伐浣滄韩搴�:+ 85 C 灏哄:7 mm W x 5 mm L x 1.5 mm H 灏佽:
DS10-80B 鍒堕€犲晢:TRANSMISSION DEVELOPMENTS 鍔熻兘鎻忚堪:MOULDED SPUR GEAR 1.0, 80
DS1080CL 鍒堕€犲晢:MAXIM 鍒堕€犲晢鍏ㄧū:Maxim Integrated Products 鍔熻兘鎻忚堪:Spread-Spectrum Crystal Multiplier
DS1080CLU+ 鍔熻兘鎻忚堪:鏅�(sh铆)閻樼櫦(f膩)鐢熷櫒鍙婃敮鎸佺敘(ch菐n)鍝� Spread-Spectrum Crystal Multiplier RoHS:鍚� 鍒堕€犲晢:Silicon Labs 椤�(l猫i)鍨�:Clock Generators 鏈€澶ц几鍏ラ牷鐜�:14.318 MHz 鏈€澶ц几鍑洪牷鐜�:166 MHz 杓稿嚭绔暩(sh霉)閲�:16 鍗犵┖姣� - 鏈€澶�:55 % 宸ヤ綔闆绘簮闆诲:3.3 V 宸ヤ綔闆绘簮闆绘祦:1 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-56
DS1080CLU+T 鍔熻兘鎻忚堪:鏅�(sh铆)閻樼櫦(f膩)鐢熷櫒鍙婃敮鎸佺敘(ch菐n)鍝� Spread-Spectrum Crystal Multiplier RoHS:鍚� 鍒堕€犲晢:Silicon Labs 椤�(l猫i)鍨�:Clock Generators 鏈€澶ц几鍏ラ牷鐜�:14.318 MHz 鏈€澶ц几鍑洪牷鐜�:166 MHz 杓稿嚭绔暩(sh霉)閲�:16 鍗犵┖姣� - 鏈€澶�:55 % 宸ヤ綔闆绘簮闆诲:3.3 V 宸ヤ綔闆绘簮闆绘祦:1 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-56