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參數(shù)資料
| 型號： | DS1010G-250 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Delay Line |
| 英文描述： | SILICON DELAY LINE, TRUE OUTPUT, PDIP14 |
| 封裝： | 0.300 INCH, DIP-14 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 1392K |
| 代理商： | DS1010G-250 |
DS1010
4 of 6
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. VCC = 5V @ 25°C. Input-to-tap delays accurate on both rising and falling edges within ±2 ns or ±5%
whichever is greater.
4. See “Test Conditions” section.
5. For DS1010 delay lines with a TAP 10 delay of 100 ns or greater, temperature variations from 25
°C
to 0
°C or 70°C may produce an additional input-to-tap delay shift of ±2ns or ±3%, whichever is
greater.
6. For DS1010 delay lines with a TAP 10 delay less than 100 ns, temperature variations from 25
°C to
0
°C or 70°C may produce an additional input-to-tap delay shift of ±1 ns or ±9%, whichever is greater.
7. All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP
1 slows down, all other taps will also slow down; TAP 3 can never be faster than TAP 2.
8. Pulse width and period specifications may be exceeded; however, accuracy will be application-
sensitive (decoupling, layout, etc.).
9. Certain high-frequency applications not recommended for -50 in 16-pin package. Consult factory.
TIMING DIAGRAM: SILICON DELAY LINE Figure 2
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相關代理商/技術參數(shù) |
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|---|---|
| DS1010G300 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| DS1010G350 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| DS1010G400 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| DS1010G450 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| DS1010G50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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