參數(shù)資料
型號(hào): DP83848CVVX/NOPB
廠商: National Semiconductor
文件頁數(shù): 39/86頁
文件大?。?/td> 0K
描述: TXRX ETHERNET PHYTER 48LQFP
產(chǎn)品培訓(xùn)模塊: PHYTER® Family
標(biāo)準(zhǔn)包裝: 1
系列: *
其它名稱: DP83848CVVX/NOPBDKR
43
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DP
83
84
8
C
7
Collision Test
0, RW
Collision Test:
1 = Collision test enabled.
0 = Normal operation.
When set, this bit will cause the COL signal to be asserted in response
to the assertion of TX_EN within 512-bit times. The COL signal will be
de-asserted within 4-bit times in response to the de-assertion of
TX_EN.
6:0
RESERVED
0, RO
RESERVED: Write ignored, read as 0.
Table 12. Basic Mode Control Register (BMCR), address 0x00 (Continued)
Bit
Bit Name
Default
Description
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