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參數(shù)資料
| 型號： | DM9102A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 28/77頁 |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102A |
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DM9102A
Single Chip Fast Ethernet NIC controller
28
Final
Version: DM9102A-DS-F03
August 28, 2000
5. Transmit Descriptor Base Address (CR4)
Bit
31:0
31 30
29 28 27 26 25 24 23 22 21 20 19 18
17 16 15 14 13 12
11 10
9 8 7 6 5 4 3
2
1 0
0
0
0
0
Name
TDBA
Default
00000000h,
RW
Description
Transmit Descriptor Base Address
This register defines base address of transmit descriptor-chain. The transmit
descriptor- polling command after
CR4 is set will make DM9102A to fetch the descriptor at the Base-Address.
6. Network Status Report Register (CR5)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
25:23
Name
SBEB
Default
000,RO
Description
System Bus Error Bits
These bits are read only and used to indicate the type of system bus fetal error. Valid
only when System Bus Error is set. The mapping bits are shown below.
Bit25 Bit24 Bit23 Bus Error Type
0 0 0 Parity error
0 0 1 Master abort
0 1 0 Slave abort
0 1 1 Reserved
1 X X Reserved
Transmit Process State
These bits are read only and used to indicate the state of transmit process.
The mapping table is shown below.
Bit22 Bit21 Bit20 Process State
0 0 0 Transmit process stopped
0 0 1 Fetch transmit descriptor
0 1 0 Move Setup Frame from the host memory
0 1 1 Move data from host memory to transmit FIFO
1 0 0 Close descriptor by clearing owner bit of descriptor
1 0 1 Waiting end of transmit
1 1 0 Transmit end and Close descriptor by writing status
1 1 1 Transmit process suspend
Receive Process State
These bits are read only and used to indicate the state of receive process. The
mapping table is shown below.
Bit19 Bit18 Bit17 Process State
0 0 0 Receive process stopped
0 0 1 Fetch receive descriptor
0 1 0 Waiting for receive packet under buffer available
0 1 1 Move data from receive FIFO to host memory
22:20
TXPS
000,RO
19:17
RXPS
000,RO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
| DM9108APPLICATIONENGINEERINGNOTESTWO | DM9108 Application Engineering notes two |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
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